graph LR
subgraph "LLC諧振變換器拓撲"
A["380VDC輸入"] --> B["EMI濾波器"]
B --> C["輸入電容組"]
C --> D["LLC諧振網路 \n Lr, Cr"]
D --> E["變壓器初級"]
E --> F["VBP18R47S \n 高壓開關管"]
F --> G["初級地"]
H["LLC控制器"] --> I["隔離驅動器"]
I --> F
J["變壓器次級"] --> K["同步整流網路"]
K --> L["輸出濾波"]
L --> M["12V/48V輸出"]
M --> N["中間匯流排"]
O["電壓回饋"] --> H
P["電流檢測"] --> H
end
subgraph "保護與監控"
Q["RCD吸收電路"] --> F
R["過壓保護"] --> H
S["過流保護"] --> H
T["溫度監測"] --> H
U["PMBus介面"] --> H
end
style F fill:#e8f5e8,stroke:#4caf50,stroke-width:2px
熱插拔控制與硬碟供電拓撲
graph TB
subgraph "熱插拔控制通道"
A["12V/48V背板電源"] --> B["VBGL71505 \n 熱插拔開關"]
B --> C["硬碟供電節點"]
C --> D["硬碟連接器"]
D --> E["HDD/SSD硬碟"]
F["熱插拔控制器"] --> G["電流檢測放大器"]
G --> F
H["電壓檢測"] --> F
F --> I["柵極驅動器"]
I --> B
subgraph "保護電路"
J["TVS陣列"] --> C
K["RC緩衝網路"] --> B
L["熱插拔指示LED"] --> F
end
end
subgraph "多通道擴展"
M["通道1"] --> N["硬碟槽位1-4"]
O["通道2"] --> P["硬碟槽位5-8"]
Q["通道3"] --> R["硬碟槽位9-12"]
S["通道4"] --> T["硬碟槽位13-16"]
F --> M
F --> O
F --> Q
F --> S
end
style B fill:#e3f2fd,stroke:#2196f3,stroke-width:2px
背板智能電源管理拓撲
graph LR
subgraph "P-MOSFET智能開關"
A["VBGE2305 \n P溝道MOSFET"] --> B["負載連接點"]
subgraph A ["VBGE2305 內部結構"]
direction LR
GATE["柵極端"]
SOURCE["源極端"]
DRAIN["漏極端"]
end
C["12V輔助電源"] --> SOURCE
DRAIN --> D["分區負載"]
E["BMC GPIO"] --> F["電平匹配"]
F --> GATE
end
subgraph "多分區電源管理"
subgraph "Zone1: 核心控制"
H["VBGE2305_Z1"] --> I["CPU/記憶體供電"]
end
subgraph "Zone2: 散熱系統"
J["VBGE2305_Z2"] --> K["風扇/Pump"]
end
subgraph "Zone3: 外設介面"
L["VBGE2305_Z3"] --> M["網路/USB模組"]
end
subgraph "Zone4: 監控系統"
N["VBGE2305_Z4"] --> O["感測器/指示燈"]
end
P["BMC控制器"] --> Q["多路GPIO擴展"]
Q --> H
Q --> J
Q --> L
Q --> N
end
subgraph "節能控制邏輯"
R["負載監測"] --> S["功耗分析"]
S --> T["分區調度策略"]
T --> P
U["溫度監測"] --> V["動態調整"]
V --> P
end
style A fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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