graph LR
subgraph "LLC谐振变换器拓扑"
A["380VDC输入"] --> B["EMI滤波器"]
B --> C["输入电容组"]
C --> D["LLC谐振网络 \n Lr, Cr"]
D --> E["变压器初级"]
E --> F["VBP18R47S \n 高压开关管"]
F --> G["初级地"]
H["LLC控制器"] --> I["隔离驱动器"]
I --> F
J["变压器次级"] --> K["同步整流网络"]
K --> L["输出滤波"]
L --> M["12V/48V输出"]
M --> N["中间总线"]
O["电压反馈"] --> H
P["电流检测"] --> H
end
subgraph "保护与监控"
Q["RCD吸收电路"] --> F
R["过压保护"] --> H
S["过流保护"] --> H
T["温度监测"] --> H
U["PMBus接口"] --> H
end
style F fill:#e8f5e8,stroke:#4caf50,stroke-width:2px
热插拔控制与硬盘供电拓扑
graph TB
subgraph "热插拔控制通道"
A["12V/48V背板电源"] --> B["VBGL71505 \n 热插拔开关"]
B --> C["硬盘供电节点"]
C --> D["硬盘连接器"]
D --> E["HDD/SSD硬盘"]
F["热插拔控制器"] --> G["电流检测放大器"]
G --> F
H["电压检测"] --> F
F --> I["栅极驱动器"]
I --> B
subgraph "保护电路"
J["TVS阵列"] --> C
K["RC缓冲网络"] --> B
L["热插拔指示LED"] --> F
end
end
subgraph "多通道扩展"
M["通道1"] --> N["硬盘槽位1-4"]
O["通道2"] --> P["硬盘槽位5-8"]
Q["通道3"] --> R["硬盘槽位9-12"]
S["通道4"] --> T["硬盘槽位13-16"]
F --> M
F --> O
F --> Q
F --> S
end
style B fill:#e3f2fd,stroke:#2196f3,stroke-width:2px
背板智能电源管理拓扑
graph LR
subgraph "P-MOSFET智能开关"
A["VBGE2305 \n P沟道MOSFET"] --> B["负载连接点"]
subgraph A ["VBGE2305 内部结构"]
direction LR
GATE["栅极端"]
SOURCE["源极端"]
DRAIN["漏极端"]
end
C["12V辅助电源"] --> SOURCE
DRAIN --> D["分区负载"]
E["BMC GPIO"] --> F["电平匹配"]
F --> GATE
end
subgraph "多分区电源管理"
subgraph "Zone1: 核心控制"
H["VBGE2305_Z1"] --> I["CPU/内存供电"]
end
subgraph "Zone2: 散热系统"
J["VBGE2305_Z2"] --> K["风扇/Pump"]
end
subgraph "Zone3: 外设接口"
L["VBGE2305_Z3"] --> M["网络/USB模块"]
end
subgraph "Zone4: 监控系统"
N["VBGE2305_Z4"] --> O["传感器/指示灯"]
end
P["BMC控制器"] --> Q["多路GPIO扩展"]
Q --> H
Q --> J
Q --> L
Q --> N
end
subgraph "节能控制逻辑"
R["负载监测"] --> S["功耗分析"]
S --> T["分区调度策略"]
T --> P
U["温度监测"] --> V["动态调整"]
V --> P
end
style A fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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