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Optimization of Power Chain for AI-Based Tobacco Sorting Automation Lines: A Precise MOSFET/IGBT Selection Scheme Based on Main Power Control, High-Current Actuator Drive, and Intelligent Power Distribution
AI Tobacco Sorting Line Power Chain Topology Diagram

AI Tobacco Sorting Line - Power Chain System Overall Topology

graph LR %% Main AC Input & Primary Power Stage subgraph "AC Input & Main Power Control" AC_MAIN["3-Phase 400VAC/50Hz
Main Power Input"] --> MAIN_BREAKER["Main Circuit Breaker
with Surge Protection"] MAIN_BREAKER --> INPUT_FILTER["EMI/EMC Filter
with Inrush Current Limiting"] INPUT_FILTER --> PFC_STAGE["PFC/AC-DC Converter Stage"] subgraph "Main Power Switch - IGBT Module" Q_MAIN["VBP165I80
650V/80A IGBT+FRD
TO-247"] end PFC_STAGE --> Q_MAIN Q_MAIN --> DC_BUS["High-Voltage DC Bus
~700VDC"] DC_BUS --> DC_DC_CONV["Isolated DC-DC Converters
for Subsystem Rails"] end %% Actuator Drive Section subgraph "High-Current Actuator Drive System" DC_DC_CONV --> ACT_BUS["Actuator Power Bus
24VDC/48VDC"] subgraph "Precision Ejector Valve Drivers" DRIVER_BANK1["Driver Bank 1
Vision Zone 1"] --> Q_ACT1["VBGQA1300
30V/280A
DFN8(5x6)"] DRIVER_BANK2["Driver Bank 2
Vision Zone 2"] --> Q_ACT2["VBGQA1300
30V/280A
DFN8(5x6)"] DRIVER_BANK3["Driver Bank 3
Vision Zone 3"] --> Q_ACT3["VBGQA1300
30V/280A
DFN8(5x6)"] DRIVER_BANK4["Driver Bank 4
Vision Zone 4"] --> Q_ACT4["VBGQA1300
30V/280A
DFN8(5x6)"] end Q_ACT1 --> SOL_VALVE1["High-Speed Solenoid Valve
Defect Ejection"] Q_ACT2 --> SOL_VALVE2["High-Speed Solenoid Valve
Defect Ejection"] Q_ACT3 --> SOL_VALVE3["High-Speed Solenoid Valve
Defect Ejection"] Q_ACT4 --> SOL_VALVE4["High-Speed Solenoid Valve
Defect Ejection"] ACT_BUS --> DRIVER_BANK1 ACT_BUS --> DRIVER_BANK2 ACT_BUS --> DRIVER_BANK3 ACT_BUS --> DRIVER_BANK4 end %% Intelligent Power Distribution subgraph "Intelligent Power Distribution & Management" DC_DC_CONV --> AUX_RAILS["Auxiliary Power Rails
+24V, +12V, +5V, +3.3V"] subgraph "Centralized Power Management Switches" SW_VISION["VBN2625
-60V/-53A P-MOS
TO-262"] --> VISION_SYS["Machine Vision System
High-Power LED Lighting
+ Camera Array"] SW_COMPUTE["VBN2625
-60V/-53A P-MOS
TO-262"] --> COMPUTE_SYS["Embedded Computing Unit
IPC/GPU for AI Processing"] SW_SERVO["VBN2625
-60V/-53A P-MOS
TO-262"] --> SERVO_DRV["Servo Drive Amplifiers
Conveyor Belt Control"] SW_COOLING["VBN2625
-60V/-53A P-MOS
TO-262"] --> COOLING_FANS["Cooling Fan Array
Thermal Management"] end MAIN_CONTROLLER["Main Line Controller
PLC/Industrial PC"] --> SW_VISION MAIN_CONTROLLER --> SW_COMPUTE MAIN_CONTROLLER --> SW_SERVO MAIN_CONTROLLER --> SW_COOLING AUX_RAILS --> SW_VISION AUX_RAILS --> SW_COMPUTE AUX_RAILS --> SW_SERVO AUX_RAILS --> SW_COOLING end %% Control & Monitoring Network subgraph "System Control & Health Monitoring" SENSOR_NETWORK["Sensor Network"] --> MAIN_CONTROLLER MAIN_CONTROLLER --> ACTUATOR_CTRL["Actuator Control Logic
FPGA/Timing Controller"] ACTUATOR_CTRL --> DRIVER_BANK1 ACTUATOR_CTRL --> DRIVER_BANK2 ACTUATOR_CTRL --> DRIVER_BANK3 ACTUATOR_CTRL --> DRIVER_BANK4 MAIN_CONTROLLER --> FAULT_MON["Fault Monitoring &
Predictive Maintenance"] FAULT_MON --> HMI_DISPLAY["HMI Touchscreen Display
Operator Interface"] end %% Thermal Management Hierarchy subgraph "Hierarchical Thermal Management" LEVEL1["Level 1: Forced Air Cooling"] --> HEATSINK_MAIN["Main IGBT Heatsink"] LEVEL1 --> HEATSINK_PMOS["Power Switch Heatsinks"] LEVEL2["Level 2: PCB Thermal Design"] --> Q_ACT1 LEVEL2 --> Q_ACT2 LEVEL2 --> Q_ACT3 LEVEL2 --> Q_ACT4 LEVEL3["Level 3: Chassis Conduction"] --> CONTROL_ICS["Control ICs &
Gate Drivers"] end %% Protection Circuits subgraph "System Protection Network" PROT_SNUBBER["RCD Snubber Network"] --> Q_MAIN PROT_FREEWHEEL["Freewheeling Diodes
Schottky Array"] --> Q_ACT1 PROT_FREEWHEEL --> Q_ACT2 PROT_FREEWHEEL --> Q_ACT3 PROT_FREEWHEEL --> Q_ACT4 PROT_GATE["Gate Protection
Zener Clamps"] --> Q_MAIN PROT_GATE --> Q_ACT1 PROT_CURRENT["Current Sensing &
Desaturation Detection"] --> MAIN_CONTROLLER end %% Styling Definitions style Q_MAIN fill:#e8f4f8,stroke:#1e88e5,stroke-width:2px style Q_ACT1 fill:#f3e5f5,stroke:#8e24aa,stroke-width:2px style SW_VISION fill:#e8f5e9,stroke:#43a047,stroke-width:2px style MAIN_CONTROLLER fill:#fff3e0,stroke:#ff9800,stroke-width:2px

Preface: Building the "Power Nervous System" for Intelligent Manufacturing – Discussing the Systems Thinking Behind Power Device Selection in Precision Sorting
In the era of Industry 4.0, AI-based tobacco sorting lines represent a pinnacle of integration between optical sensing, real-time computing, and precise mechanical actuation. The stability, speed, and efficiency of this electromechanical system fundamentally rely on a robust, responsive, and intelligent power delivery and management backbone. Its core performance—high-speed actuator response, minimal downtime, and coordinated operation of diverse subsystems (imaging, computing, air jets, conveyors)—is deeply rooted in the proper selection and application of power semiconductor devices at critical nodes.
This article adopts a holistic, system-level design approach to address the core challenges within the power chain of tobacco sorting equipment: how to select the optimal power MOSFETs/IGBTs for main AC-DC input power control, high-current pulsed actuator drive (e.g., solenoid valves, ejectors), and multi-channel low-voltage auxiliary power management, under the constraints of high reliability, compact space, continuous operation, and cost-effectiveness.
Within the design of an automated sorting line, the power conversion and distribution module is pivotal for system uptime, sorting accuracy (through consistent actuator force), and thermal management. Based on comprehensive considerations of input surge protection, transient high-current handling for actuators, and intelligent load sequencing, this article selects three key devices from the component library to construct a hierarchical and robust power solution.
I. In-Depth Analysis of the Selected Device Combination and Application Roles
1. The Guardian of the Power Entry: VBP165I80 (650V IGBT+FRD, 80A, TO-247) – Main AC-DC Input Stage & Braking/Clamping Switch
Core Positioning & Topology Deep Dive: Positioned at the front-end of the line's power supply, typically in the PFC (Power Factor Correction) stage or as the main switch in a high-power AC-DC converter. Its integrated 650V/80A IGBT with co-packaged Fast Recovery Diode (FRD) is ideal for hard-switching or soft-switching topologies (e.g., Boost PFC, Active Clamp). The 650V rating provides robust margin for universal line voltages (85-265VAC) and surge events. The integrated FRD is crucial for inductive energy circulation in PFC circuits or for serving as an active braking/clamping switch for conveyor motors.
Key Technical Parameter Analysis:
Robustness vs. Efficiency: The VCEsat of 1.7V @15V offers a balance between conduction loss and cost for this power level. Its high current rating (80A) ensures safe handling of inrush and peak loads from multiple parallel subsystems.
Integrated FRD Value: Eliminates the need for an external diode in switching positions, simplifying layout, reducing parasitics, and enhancing reliability for the freewheeling path—a critical factor for continuous 24/7 operation.
Selection Trade-off: Compared to Superjunction MOSFETs at this voltage (which may offer lower switching loss but higher cost and gate drive complexity), this IGBT+FRD combination provides an optimal blend of ruggedness, proven reliability, and cost-effectiveness for the main power stage in industrial environments.
2. The Muscle of High-Speed Actuation: VBGQA1300 (30V, 280A, DFN8(5x6)) – High-Current Pulse Driver for Solenoid Valves/Ejectors
Core Positioning & System Benefit: This device is the core switch for driving high-speed, high-power pneumatic ejectors or solenoid valves responsible for defective leaf removal. Its ultra-low Rds(on) of 0.7mΩ is a game-changer:
Maximized Actuator Speed & Force: Minimizes voltage drop across the switch, ensuring nearly full bus voltage (e.g., 24V) is delivered to the actuator coil. This enables faster magnetic field buildup, translating to quicker valve response and higher ejection force—directly improving sorting accuracy and throughput.
Dramatically Reduced Power Loss & Heat: At peak currents (often 50-150A pulses), conduction losses are exceptionally low. This allows for more compact actuator driver designs, reduces cooling requirements, and improves long-term reliability.
Compactness for Distributed Control: The DFN8(5x6) package offers an unparalleled power density. It enables the placement of driver switches very close to actuator banks on distributed control boards, minimizing parasitic inductance in high-di/dt paths and improving noise immunity.
Drive Design Key Points: Its very high current capability demands a low-inductance gate drive loop and a driver capable of sourcing/sinking several amperes peak current to quickly charge/discharge the significant Qg, ensuring crisp switching essential for precise pulse-width control.
3. The Intelligent Power Distributor: VBN2625 (Dual -60V, -53A, TO-262) – Centralized Auxiliary Power Rail Management Switch
Core Positioning & System Integration Advantage: This P-Channel MOSFET in a TO-262 package serves as the ideal intelligent high-side switch for managing power to major auxiliary subsystems: machine vision lighting (high-power LEDs), embedded computing units (IPC/GPU), servo drive amplifiers, and cooling fans.
Application Example: Enables sequential power-up (e.g., controllers first, then actuators), zone-based power gating for fault isolation, or emergency shutdown of non-critical loads during a fault.
Key Technical Parameter Analysis:
Low Rds(on) for High Loads: With Rds(on) of only 16mΩ @10V, it introduces negligible voltage drop even when supplying tens of amperes to multiple loads, maintaining rail stability.
P-Channel Simplification: As a high-side switch on the +24V or +48V rail, it can be controlled directly by a logic-level signal from the master PLC or system microcontroller (gate pulled low to turn on). This eliminates the need for charge pumps or level shifters, simplifying circuit design and improving reliability.
Package for Power & Cooling: The TO-262 package offers a good balance between current-handling capability, PCB footprint, and thermal dissipation via its metal tab, which can be attached to a chassis or heatsink for managed loads.
II. System Integration Design and Expanded Key Considerations
1. Topology, Drive, and Control Loop Synchronization
Main Power & System Health Monitoring: The gate drive for VBP165I80 must be synchronized with the PFC/DC-DC controller. Its operational status (e.g., via desaturation detection) can be fed back to the central Line Controller for predictive maintenance.
Precision Pulse Control for Actuators: VBGQA1300 acts as the final execution element for the high-speed sorting algorithm. Its switching timing, controlled by FPGAs or dedicated motor control ICs, must have nanosecond-level precision and consistency to synchronize ejection with camera detection.
Digital Power Domain Management: The gate of VBN2625 is controlled via digital I/O or PWM from the system controller, allowing for soft-start of capacitive loads (computing units), load current monitoring via sense resistors, and implementation of overcurrent lockout protection.
2. Hierarchical Thermal Management Strategy
Primary Heat Source (Forced Air Cooling): VBP165I80 in the main power supply and VBN2625 managing high-power auxiliary rails are primary heat sources. They should be mounted on properly sized heatsinks with forced air cooling from system fans.
Secondary Heat Source (PCB Thermal Design): Multiple VBGQA1300 devices driving actuator banks will generate concentrated heat. Their DFN packages rely on exposed thermal pads soldered to large, multi-layer PCB copper pours with extensive via arrays to conduct heat to inner layers or board edges.
Tertiary Heat Source (Ambient/Chassis Conduction): Low-power distribution circuits and gate drivers utilize natural convection and conduction through the PCB to the metal enclosure.
3. Engineering Details for Reliability Reinforcement
Electrical Stress Protection:
VBP165I80: Requires snubber networks across the switch or transformer primary to dampen voltage spikes caused by leakage inductance, especially during turn-off.
VBGQA1300: The highly inductive actuator loads mandate robust freewheeling diodes (possibly Schottky) placed directly across the coil terminals to safely absorb turn-off energy and protect the MOSFET.
VBN2625: Input and output capacitors are needed to buffer the managed power rails. TVS diodes may be required on the input side for surge suppression.
Enhanced Gate Protection: All gate drives should include series resistors, low-ESR bypass capacitors very close to the MOSFET, and bi-directional Zener diodes (e.g., ±15V to ±20V) clamps to prevent VGS overshoot/undershoot from coupled noise.
Derating Practice:
Voltage Derating: VBP165I80's VCE stress should remain below 80% of 650V (520V). VBN2625's VDS should have margin above the maximum auxiliary bus voltage (e.g., derated for 48V use).
Current & Thermal Derating: Continuous and pulse current ratings must be derated based on the actual operating junction temperature (Tj), using transient thermal impedance curves. Ensure Tj remains below 110-125°C under worst-case ambient conditions and load profiles.
III. Quantifiable Perspective on Scheme Advantages
Quantifiable Throughput Improvement: Using VBGQA1300 with its ultra-low Rds(on) can reduce actuator electrical response time by up to 15-20% compared to standard MOSFETs, potentially increasing sorting line speed or allowing for tighter product spacing on the conveyor.
Quantifiable Uptime & Reliability Improvement: The rugged construction of VBP165I80 and the integrated protection simplification offered by the high-side P-MOSFET (VBN2625) reduce potential failure points in the power chain, directly contributing to higher Mean Time Between Failures (MTBF) for the sorting station.
Quantifiable Space Savings: The use of the DFN8-packaged VBGQA1300 for actuator drivers and the single TO-262 VBN2625 for power distribution can save over 40% PCB area in the control panel compared to discrete solutions using multiple TO-220 or DPAK devices, enabling more compact equipment design.
IV. Summary and Forward Look
This scheme presents a complete, optimized power chain for AI tobacco sorting automation lines, spanning from robust AC input conditioning and high-speed pulsed power delivery to intelligent subsystem power management. Its essence is "right-sizing for robustness, precision, and control":
Power Input Level – Focus on "Ruggedness & Reliability": Select proven, robust IGBT-based solutions to ensure unconditional stability against line disturbances.
Actuator Drive Level – Focus on "Ultimate Performance & Density": Employ state-of-the-art low-voltage, ultra-low Rds(on) MOSFETs in miniature packages to achieve the fastest possible electromechanical response in a minimal footprint.
Power Management Level – Focus on "Simplified Control & Integration": Utilize P-MOSFETs for intuitive high-side switching, enabling clean and reliable digital control over various power domains.
Future Evolution Directions:
Integrated Smart Drivers: Migration towards Intelligent Power Switches (IPS) or motor driver ICs that integrate the gate driver, protection, diagnostics, and the power MOSFET for each actuator channel, further simplifying design and enhancing diagnostic capabilities.
Wider Bandgap for Auxiliary Power: For high-efficiency, high-density isolated DC-DC converters powering sensitive electronics (cameras, processors), consideration of GaN-based solutions for higher switching frequencies and reduced magnetics size.
Predictive Health Monitoring: Leveraging the inherent on-resistance of MOSFETs like VBGQA1300 as a temperature-sensitive parameter for real-time junction temperature estimation and predictive failure analysis.
Engineers can refine this framework based on specific line parameters such as main voltage (1-phase/3-phase), actuator count and peak current, auxiliary load inventory, and required safety integrity levels (SIL/PL) to design high-performance, robust, and intelligent tobacco sorting systems.

Detailed Power Chain Topology Diagrams

Main AC-DC Power Control & Braking Circuit Detail

graph LR subgraph "Three-Phase AC Input Stage" AC_L1["Phase L1"] --> SURGE_PROT["Surge Protection
MOV Array"] AC_L2["Phase L2"] --> SURGE_PROT AC_L3["Phase L3"] --> SURGE_PROT SURGE_PROT --> INRUSH_LIMIT["Inrush Current Limiter
NTC + Relay Bypass"] INRUSH_LIMIT --> EMI_FILTER["Three-Phase EMI Filter"] end subgraph "PFC & Main Power Conversion" EMI_FILTER --> RECT_BRIDGE["Three-Phase Rectifier Bridge"] RECT_BRIDGE --> PFC_INDUCTOR["PFC Boost Inductor"] PFC_INDUCTOR --> PFC_SW_NODE["PFC Switching Node"] PFC_SW_NODE --> Q_MAIN_DET["VBP165I80
650V/80A IGBT+FRD"] Q_MAIN_DET --> HV_DC_BUS["High-Voltage DC Bus
700VDC"] subgraph "Integrated Fast Recovery Diode" FRD_INT["Co-packaged FRD
for Freewheeling Path"] end Q_MAIN_DET --> FRD_INT PFC_CONTROLLER["PFC Controller IC"] --> GATE_DRIVER["Gate Driver
with Isolation"] GATE_DRIVER --> Q_MAIN_DET HV_DC_BUS --> VOLT_FEEDBACK["Voltage Feedback"] --> PFC_CONTROLLER end subgraph "Conveyor Motor Braking/Clamping" CONV_MOTOR["Conveyor Drive Motor"] --> BRAKE_SW_NODE["Braking Circuit Node"] BRAKE_SW_NODE --> Q_BRAKE["VBP165I80
as Active Brake Switch"] Q_BRAKE --> BRAKE_RES["Braking Resistor Bank"] BRAKE_CONTROLLER["Motor Controller"] --> BRAKE_DRIVER["Brake Gate Driver"] BRAKE_DRIVER --> Q_BRAKE end style Q_MAIN_DET fill:#e8f4f8,stroke:#1e88e5,stroke-width:2px style Q_BRAKE fill:#e8f4f8,stroke:#1e88e5,stroke-width:2px

High-Current Actuator Pulse Driver Detail

graph LR subgraph "Single Actuator Driver Channel" VISION_PROC["Vision Processor
Defect Detection"] --> TIMING_CTRL["Precision Timing Controller
FPGA/Nanosecond Accuracy"] TIMING_CTRL --> GATE_DRIVE_IC["High-Current Gate Driver IC
4A Peak Source/Sink"] GATE_DRIVE_IC --> DRIVER_NODE["Driver Output"] DRIVER_NODE --> Q_ACT_DET["VBGQA1300
30V/280A
Rds(on)=0.7mΩ
DFN8(5x6)"] ACT_POWER["Actuator Bus 24V/48V"] --> CURRENT_SENSE["High-Side Current Sensor
for Pulse Monitoring"] CURRENT_SENSE --> Q_ACT_DET Q_ACT_DET --> ACTUATOR_COIL["Solenoid Valve Coil
Inductive Load 50-150A Peak"] subgraph "Critical Protection Elements" FREEWHEEL_DIODE["Schottky Freewheeling Diode
Across Coil Terminals"] GATE_PROTECTION["Zener Clamp ±18V
Gate-Source Protection"] PCB_THERMAL["Exposed Thermal Pad
to PCB Copper Pour
with Multiple Vias"] end ACTUATOR_COIL --> FREEWHEEL_DIODE GATE_DRIVE_IC --> GATE_PROTECTION Q_ACT_DET --> PCB_THERMAL end subgraph "Parallel Driver Bank Architecture" DRIVER_BANK["Actuator Driver Bank
8-16 Channels per Zone"] --> Q_ARRAY1["VBGQA1300 Array
Channel 1-4"] DRIVER_BANK --> Q_ARRAY2["VBGQA1300 Array
Channel 5-8"] DRIVER_BANK --> Q_ARRAY3["VBGQA1300 Array
Channel 9-12"] DRIVER_BANK --> Q_ARRAY4["VBGQA1300 Array
Channel 13-16"] Q_ARRAY1 --> VALVE_ARRAY1["Solenoid Valve Array
Zone 1"] Q_ARRAY2 --> VALVE_ARRAY2["Solenoid Valve Array
Zone 2"] Q_ARRAY3 --> VALVE_ARRAY3["Solenoid Valve Array
Zone 3"] Q_ARRAY4 --> VALVE_ARRAY4["Solenoid Valve Array
Zone 4"] end style Q_ACT_DET fill:#f3e5f5,stroke:#8e24aa,stroke-width:2px style Q_ARRAY1 fill:#f3e5f5,stroke:#8e24aa,stroke-width:2px

Intelligent Power Distribution & Management Detail

graph LR subgraph "Centralized Power Rail Management" MAIN_CONTROLLER_DET["Main Controller PLC"] --> DIGITAL_IO["Digital I/O & PWM
Control Signals"] subgraph "High-Side P-MOSFET Switch Channel" POWER_RAIL["+24V/+48V Auxiliary Rail"] --> INPUT_CAP["Input Capacitor Bank
Low-ESR"] INPUT_CAP --> Q_PMOS["VBN2625
-60V/-53A P-MOSFET
Rds(on)=16mΩ @10V
TO-262"] DIGITAL_IO --> GATE_CTRL["Gate Control Circuit"] GATE_CTRL --> Q_PMOS Q_PMOS --> OUTPUT_CAP["Output Capacitor Bank
for Load Buffering"] OUTPUT_CAP --> LOAD_CONN["Load Connection Point"] LOAD_CONN --> CURRENT_MON["Current Sense Resistor
for Load Monitoring"] CURRENT_MON --> LOAD["Subsystem Load"] end end subgraph "Sequential Power-Up & Fault Management" POWER_SEQUENCE["Power Sequence Controller"] --> SEQ_CH1["Channel 1: Controllers First"] POWER_SEQUENCE --> SEQ_CH2["Channel 2: Sensors & Vision"] POWER_SEQUENCE --> SEQ_CH3["Channel 3: Actuator Power"] POWER_SEQUENCE --> SEQ_CH4["Channel 4: Non-Critical Loads"] SEQ_CH1 --> SW_SEQ1["VBN2625
Sequence Switch 1"] SEQ_CH2 --> SW_SEQ2["VBN2625
Sequence Switch 2"] SEQ_CH3 --> SW_SEQ3["VBN2625
Sequence Switch 3"] SEQ_CH4 --> SW_SEQ4["VBN2625
Sequence Switch 4"] subgraph "Fault Isolation Zones" ZONE_FAULT["Zone Fault Detection"] --> FAULT_LATCH["Fault Latch Circuit"] FAULT_LATCH --> SHUTDOWN_SIGNAL["Selective Shutdown Signal"] SHUTDOWN_SIGNAL --> SW_SEQ1 SHUTDOWN_SIGNAL --> SW_SEQ2 SHUTDOWN_SIGNAL --> SW_SEQ3 SHUTDOWN_SIGNAL --> SW_SEQ4 end end subgraph "Thermal & Electrical Protection" subgraph "Thermal Management per Device" HEATSINK_PMOS_DET["TO-262 Metal Tab
to Heatsink/Chassis"] AIRFLOW["Forced Air Cooling
for High-Power Switches"] end subgraph "Electrical Protection" TVS_RAIL["TVS Diode Array
Rail Surge Suppression"] OVERCURRENT["Overcurrent Comparator
with Adjustable Threshold"] UVLO["Undervoltage Lockout
for Gate Control"] end TVS_RAIL --> Q_PMOS OVERCURRENT --> GATE_CTRL UVLO --> GATE_CTRL end style Q_PMOS fill:#e8f5e9,stroke:#43a047,stroke-width:2px style SW_SEQ1 fill:#e8f5e9,stroke:#43a047,stroke-width:2px
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