In the era of artificial intelligence, high-end liquid-cooled server clusters form the computational core for training and inference. Their performance and reliability are fundamentally determined by the capabilities of their server power supply units (PSUs) and point-of-load (POL) converters. These systems act as the "heart and arteries," responsible for delivering massive, ultra-stable, and precisely regulated power to CPUs, GPUs, ASICs, and memory. The selection of power MOSFETs profoundly impacts power density, conversion efficiency, thermal management under extreme loads, and lifecycle reliability. This article, targeting the demanding application scenario of AI servers—characterized by stringent requirements for high current, fast transient response, efficiency at low voltages, and operation within constrained, liquid-cooled environments—conducts an in-depth analysis of MOSFET selection considerations for key power nodes, providing a complete and optimized device recommendation scheme.
Detailed MOSFET Selection Analysis
1. VBM165R32SE (N-MOS, 650V, 32A, TO-220)
Role: Main switch for the PFC (Power Factor Correction) stage or primary-side switch in an isolated LLC DC-DC converter within the 2kW+ server PSU.
Technical Deep Dive:
Voltage Stress & Topology Suitability: In a 230VAC or wide-range input (85-265VAC) server PSU, the rectified high-voltage bus can exceed 400VDC. The 650V rating provides a critical safety margin for industrial-grade reliability. Utilizing Super Junction Deep-Trench technology, it offers an excellent balance of low specific on-resistance (89mΩ @10V) and switching performance. This makes it an ideal cost-effective and reliable choice for high-frequency, high-efficiency PFC or LLC stages, forming the robust front-end of the server's power delivery network (PDN).
Thermal & Power Scalability: The TO-220 package is well-suited for mounting on a dedicated heatsink within the PSU module. Its 32A current rating supports multi-phase interleaved topologies common in 2kW-3.5kW PSUs. This device enables the design of high-power-density, 80Plus Titanium-efficiency PSUs, which are essential for minimizing data center operational expenditure (OPEX).
2. VBM1615 (N-MOS, 60V, 60A, TO-220)
Role: Primary synchronous rectifier (SR) in the isolated DC-DC stage or main switch for high-current intermediate bus converters (IBCs) and multi-phase buck converters.
Extended Application Analysis:
Efficiency-Critical Power Conversion Core: This device is engineered for stages where conduction loss is paramount. Its exceptionally low on-resistance (11mΩ @10V) and high continuous current (60A) make it a superior choice for synchronous rectification in 12V or 48V bus DC-DC converters, or as the low-side switch in high-current, non-isolated POL converters. Minimizing conduction loss here directly boosts overall system efficiency, reducing the thermal load on the liquid cooling system.
Dynamic Performance for High di/dt: The trench technology provides a favorable gate charge to Rds(on) ratio, enabling efficient high-frequency operation (hundreds of kHz). This allows for a reduction in the size of output filter inductors and capacitors, which is critical for achieving high power density on server motherboards or GPU boards. Its robust 60V rating offers ample margin for 12V/48V bus applications, handling voltage spikes with reliability.
Thermal Integration: The TO-220 package facilitates effective thermal coupling to a cold plate or heatsink, ensuring that the low Rds(on) translates directly into lower junction temperature under high current, sustained workloads typical of AI training.
3. VBQA1202 (N-MOS, 20V, 150A, DFN8(5x6))
Role: Ultra-high-current, low-voltage synchronous buck converter switch for CPU/GPU/ASIC core voltage (Vcore) VRMs (Voltage Regulator Modules).
Precision Power & Density Management:
Ultimate Power Density for POL: This device represents the pinnacle of low-voltage, high-current MOSFET technology. With a staggeringly low Rds(on) of 1.7mΩ @10V and a monumental 150A continuous current rating, it is purpose-built for the most demanding multi-phase (e.g., 20+ phase) Vcore VRMs. The compact DFN8(5x6) package maximizes power stage density on the motherboard, sitting directly adjacent to the processor socket.
Minimizing Conduction & Switching Losses: The ultra-low Rds(on) is the primary weapon against I²R losses, which are extreme at core currents exceeding 500A. Furthermore, the low gate charge associated with its trench technology ensures fast switching and minimizes driver loss, crucial for maintaining high efficiency at high multi-phase switching frequencies.
Thermal Challenge & Solution: While dissipating immense power, its thermally enhanced DFN package is designed for direct soldering to a massive multilayer PCB copper plane, which acts as a primary heat spreader interfacing directly with the server's liquid cold plate. This direct cooling path is non-negotiable for managing the intense localized heat flux of AI processor VRMs.
System-Level Design and Application Recommendations
Drive Circuit Design Key Points:
High-Voltage Switch Drive (VBM165R32SE): Requires a dedicated gate driver. Attention must be paid to managing switching node dv/dt and preventing parasitic turn-on via proper gate drive strength and, if necessary, a small Miller clamp.
High-Current Synchronous Rectifier Drive (VBM1615): Requires a driver with strong sink/source capability to manage the high gate charge swiftly, minimizing dead-time and body diode conduction losses. Layout must focus on minimizing common source inductance.
Ultra-High-Current Vcore FET Drive (VBQA1202): Demands a tightly integrated, multi-phase PWM controller and driver combo. The PCB layout is critical: symmetric, ultra-low-inductance power loops and gate drive paths are essential to ensure current sharing between phases and prevent voltage spikes.
Thermal Management and EMC Design:
Tiered Thermal Design: VBM165R32SE in the PSU requires its own heatsink. VBM1615 devices on the motherboard/GPU card should be thermally coupled to the cold plate via thermal interface materials. VBQA1202 FETs rely entirely on thermal vias into the PCB and the overarching liquid cooling cold plate assembly.
EMI & Noise Suppression: Use snubbers across the drain-source of VBM165R32SE to dampen high-frequency ringing. Implement high-frequency decoupling capacitors (MLCC arrays) very close to the drain and source of VBQA1202 to manage the massive, high-di/dt currents and maintain clean processor supply voltage. Full use of power and ground planes is mandatory.
Reliability Enhancement Measures:
Adequate Derating: Operating junction temperature for all devices, especially VBQA1202, must be monitored and kept within strict limits (e.g., Tj < 125°C) even during turbo power events. Voltage derating should be applied to the 650V and 60V devices.
Intelligent Protection & Monitoring: VRM phases using VBQA1202 should feature individual phase current monitoring and over-temperature protection. The system should implement fault reporting and adaptive power throttling.
Enhanced Robustness: Gate protection devices (TVS, resistors) are essential for all MOSFETs in the noisy server environment. The high-current paths must be designed to withstand mechanical stress from thermal cycling inherent in liquid-cooled systems.
Conclusion
In the design of power delivery systems for high-end liquid-cooled AI server clusters, power MOSFET selection is key to achieving maximum computational performance, optimal power usage effectiveness (PUE), and unwavering reliability. The three-tier MOSFET scheme recommended in this article embodies the design philosophy of high power density, peak efficiency, and precision management.
Core value is reflected in:
Full-Stack Efficiency Optimization: From high-efficiency AC-DC conversion in the PSU (VBM165R32SE), through low-loss intermediate power distribution (VBM1615), down to the ultra-efficient, direct core voltage conversion (VBQA1202), a complete high-efficiency power chain from grid to transistor is constructed.
Unmatched Power Density: The combination of advanced package types (TO-220, DFN) and exceptional electrical characteristics allows for unprecedented power stage miniaturization, freeing up critical board space for more processing units or memory.
Thermal Performance Alignment: The selected devices, through their low Rds(on) and suitable packages, are perfectly aligned with a centralized liquid cooling strategy, enabling sustained operation at peak processor Turbo power limits.
Scalability for Future AI Workloads: The device characteristics and selection methodology support easy scaling of current capability through multi-phase and multi-device parallelism, ready to meet the escalating power demands of next-generation AI accelerators.
Future Trends:
As AI server power demands push beyond 1000W per accelerator and rack densities increase, power device selection will trend towards:
Adoption of GaN HEMTs in the PFC and high-frequency LLC stages for even higher efficiency and power density.
DrMOS and Smart Power Stages integrating the driver, MOSFETs, and protection/telemetry, further simplifying and densifying the VRM design.
Increased use of silicon carbide (SiC) in 48V direct-to-chip architectures for higher efficiency distribution.
This recommended scheme provides a complete power device solution for AI server clusters, spanning from the AC inlet to the processor core. Engineers can refine this selection based on specific voltage regulator architectures (e.g., 12V vs. 48V bus), thermal design specifics, and target efficiency certifications to build the robust, high-performance power infrastructure that underpins the future of artificial intelligence.

Detailed Topology Diagrams