With the rapid growth of cloud computing and edge computing, the demand for flexible, efficient, and quickly deployable data center capacity has surged. Micro-module data center expansion kits, as prefabricated power and cooling solutions, have become key to achieving rapid scalability. The power conversion and distribution system, serving as the "energy heart" of the entire module, provides stable and efficient power delivery for critical loads such as servers, storage, and cooling units. The selection of power semiconductor devices (MOSFETs/IGBTs) directly determines system efficiency, power density, thermal performance, and operational reliability. Addressing the stringent requirements of data centers for high efficiency (low PUE), high power density, 24/7 reliability, and intelligent management, this article focuses on scenario-based adaptation to develop a practical and optimized device selection strategy.
I. Core Selection Principles and Scenario Adaptation Logic
(A) Core Selection Principles: Multi-Dimensional Collaborative Optimization
Device selection requires coordinated optimization across multiple dimensions—voltage, current, loss, package, and technology—ensuring precise matching with the electrical and thermal conditions of the power architecture:
Voltage & Current Margin: For common bus voltages (12V, 48V, 400V AC), select devices with sufficient voltage and current ratings to handle inrush currents, load steps, and potential transients. A minimum of 20-30% voltage margin and 50% current margin under worst-case thermal conditions is recommended.
Loss Minimization Priority: Prioritize devices with ultra-low conduction loss (Rds(on) or VCEsat) and low switching loss (Qg, Coss for MOSFETs; Eon/Eoff for IGBTs). This is critical for improving efficiency across the load range, reducing cooling burden, and lowering total cost of ownership (TCO).
Package for Power Density & Cooling: Choose advanced packages (e.g., TOLT, DFN, TO220F) with low thermal resistance for high-power stages to maximize power density and facilitate heat sinking. For medium-power, high-density areas, compact dual-die packages save PCB space.
Technology for Application Fit: Select the appropriate device technology (SGT/Trench MOSFETs for high-frequency, low-voltage stages; Super Junction (SJ) MOSFETs or IGBTs for high-voltage, high-power stages) based on switching frequency, voltage level, and cost-performance targets.
(B) Scenario Adaptation Logic: Categorization by Power Conversion Stage
Divide the power chain into three core scenarios: First, High-Current DC-DC Conversion (e.g., 48V to 12V/5V Intermediate Bus Converter, IBC), requiring ultra-low loss and high current handling. Second, High-Density Point-of-Load (POL) & Synchronous Rectification, requiring compact size and high-frequency operation. Third, High-Voltage AC-DC Front End & UPS Stage, requiring high voltage blocking capability and robust switching performance.
II. Detailed Device Selection Scheme by Scenario
(A) Scenario 1: High-Current DC-DC Conversion (IBC) – Power Core Device
Intermediate Bus Converters handle substantial continuous power (hundreds of watts to kilowatts), demanding the highest efficiency to minimize losses before final voltage regulation.
Recommended Model: VBGQTA11505 (N-MOS, 150V, 150A, TOLT-16)
Parameter Advantages: Utilizes advanced SGT technology to achieve an exceptionally low Rds(on) of 6.2mΩ at 10V VGS. A continuous current rating of 150A (with high peak capability) is ideal for 48V bus architectures. The TOLT-16 package offers excellent thermal performance (low RthJC) and is designed for efficient heat dissipation in high-current paths.
Adaptation Value: Drastically reduces conduction loss in the primary side of LLC converters or synchronous buck stages. For a 48V-to-12V/1kW IBC stage, using such devices can push peak efficiency above 98%, directly contributing to a lower PUE. Its high current rating provides ample headroom for parallel operation or future load increases within the kit.
Selection Notes: Verify the input voltage range and maximum output current of the IBC. Ensure PCB design provides a large, thick-copper plane for the drain and source connections. Must be paired with a high-performance, high-frequency controller/driver IC. Proper gate drive design (with adequate peak current) is essential to exploit its low Rds(on) fully.
(B) Scenario 2: High-Density POL & Synchronous Rectification – Density-Critical Device
Synchronous buck converters for CPU/GPU rails and synchronous rectifiers in isolated DC-DC modules require compact, efficient switches to maximize power density per board area.
Recommended Model: VBQA3151M (Dual N-MOS, 150V, 8A per channel, DFN8(5x6)-B)
Parameter Advantages: The dual N-channel configuration in a single DFN8(5x6) package saves over 40% board space compared to two discrete SMD parts. A rated voltage of 150V is suitable for 48V input POL converters. Low Rds(on) (90mΩ @10V) and low Vth (2V) ensure good efficiency and compatibility with modern PWM controllers.
Adaptation Value: Enables the design of extremely compact, high-efficiency synchronous buck or synchronous rectification stages. Ideal for building high-power-density VRMs or secondary-side rectification in brick modules. The space saved allows for additional phases or output filtering, enhancing performance.
Selection Notes: Calculate the RMS current per MOSFET in the application to ensure it operates within safe limits with adequate thermal derating. The small package requires careful attention to PCB thermal design (thermal vias, copper area under the pad). Gate drive traces must be short and symmetric for both channels to ensure balanced switching.
(C) Scenario 3: High-Voltage AC-DC Front End / UPS Stage – Robustness-Critical Device
The PFC (Power Factor Correction) and primary inverter/rectifier stages in UPS systems or server PSUs require devices capable of blocking high voltages (400V AC rectified ~600V DC) while handling significant power.
Recommended Model: VBPB112MI25 (IGBT with FRD, 1200V, 25A, TO3P)
Parameter Advantages: A 1200V/25A IGBT co-packed with a fast recovery diode (FRD) provides a robust solution for hard-switching or resonant topologies at line frequencies. The low VCEsat of 1.55V (typical) minimizes conduction loss. The TO3P package is mechanically robust and offers good thermal dissipation for this power level.
Adaptation Value: Provides a reliable and cost-effective solution for three-phase rectification, PFC boost stages, or the inverter bridge in online UPS modules. Its high voltage rating offers strong margin against AC line surges. The integrated FRD simplifies design and improves reverse recovery characteristics.
Selection Notes: Suitable for switching frequencies typically up to 20-50kHz. Thermal design is critical; a proper heatsink is mandatory. Drive voltage must be sufficient (typically 15V) to keep the IGBT in saturation. Consider switching loss (Eon/Eoff) in overall efficiency calculations, especially at higher frequencies.
III. System-Level Design Implementation Points
(A) Drive Circuit Design: Matching Device Characteristics
VBGQTA11505: Requires a dedicated high-current gate driver (e.g., >4A peak) located very close to the device. Use low-inductance gate loop layout. Consider a gate resistor to fine-tune switching speed and mitigate ringing.
VBQA3151M: Can be driven directly by many POL controller integrated drivers. Ensure the controller's drive strength is adequate for the combined gate charge of two MOSFETs. Maintain symmetry in the gate drive paths.
VBPB112MI25: Use a standard IGBT gate driver IC with negative turn-off bias (e.g., -5 to -8V) for improved noise immunity and to prevent parasitic turn-on. A desaturation detection circuit is recommended for short-circuit protection.
(B) Thermal Management Design: Tiered Strategy
VBGQTA11505: Mount on a dedicated heatsink or use a thermally conductive pad to transfer heat to the module's cold plate or chassis. Use multiple thermal vias under the package pad.
VBQA3151M: Rely on a generous copper pour on the PCB (top and bottom layers connected by vias) as the primary heatsink. Ensure airflow from system fans passes over this area.
VBPB112MI25: Must be mounted on a sizable aluminum heatsink. Use thermal interface material (TIM) and proper mounting torque. Position in the main airflow path of the power supply's internal fan.
(C) EMC and Reliability Assurance
EMC Suppression:
VBGQTA11505: Use low-ESR/ESL ceramic capacitors very close to the drain and source pins. A small RC snubber across the drain-source may be needed to damp high-frequency ringing.
VBQA3151M: Careful layout of the high di/dt switching loops is paramount. Keep power loops small and use ground planes effectively.
VBPB112MI25: Snubber networks across the IGBT collector-emitter are often necessary to limit voltage overshoot and reduce EMI.
Reliability Protection:
Implement comprehensive overcurrent protection (shunt resistors, hall sensors, or desat detection for IGBTs) and overtemperature protection (NTC thermistors on heatsinks).
Employ input surge protection (MOVs) and DC bus overvoltage clamping (TVS diodes or varistors) especially for the high-voltage stage (VBPB112MI25).
Adhere to voltage and current derating guidelines across all operating temperatures.
IV. Scheme Core Value and Optimization Suggestions
(A) Core Value
Optimized Efficiency Chain: From AC input to low-voltage POL, the selected devices minimize losses at each stage, enabling the expansion kit to achieve best-in-class PUE contribution.
Maximized Power Density: The use of compact, high-performance packages (DFN, TOLT) allows for more power conversion in less space, supporting higher rack-level kW/U density.
Balanced Reliability and Cost: The combination of a high-current MOSFET, a space-saving dual MOSFET, and a robust IGBT covers all critical power stages with field-proven, cost-optimized technologies suitable for volume deployment.
(B) Optimization Suggestions
For Higher Power IBCs (>3kW): Consider paralleling multiple VBGQTA11505 devices or investigating modules with even lower Rds(on).
For Higher Frequency POLs: If switching above 500kHz, evaluate devices with lower Qg and Coss, potentially in even smaller packages (e.g., DFN 3x3).
For Higher Efficiency PFC: For applications where switching frequency is higher, consider replacing the IGBT with a Super Junction MOSFET like VBN16R20S (600V, 20A, SJ) to reduce switching losses, albeit at a potentially higher cost.
Integration Path: For future designs, explore integrated power stages (DrMOS) for POL and intelligent power modules (IPMs) for the AC-DC front end to further simplify design and improve reliability.
Conclusion
Strategic selection of MOSFETs and IGBTs is central to achieving the high efficiency, power density, and unwavering reliability demanded by micro-module data center expansion kits. This scenario-based selection scheme, covering high-current, high-density, and high-voltage stages, provides a clear technical roadmap for power design engineers. Future exploration into wide-bandgap (SiC, GaN) devices and advanced packaging will further push the boundaries, enabling the next generation of ultra-efficient, ultra-compact data center power infrastructure.

Detailed Topology Diagrams