With the rapid advancement of artificial intelligence and quantum computing, the demand for computational power has exploded. The power supply system, serving as the "energy heart" of AI quantum computers, faces unprecedented challenges: it must deliver massive currents with extreme stability, precision, and efficiency to core loads such as quantum bit (qubit) control circuits, cryogenic systems, and high-performance classical computing units. The selection of core power switching devices (IGBTs/MOSFETs) directly determines the system's power density, conversion efficiency, thermal noise level, and, most critically, the stability and fidelity of quantum operations. Addressing the stringent requirements of quantum computers for ultra-low noise, high reliability, and precise timing control, this article reconstructs the power device selection logic based on application scenario adaptation, providing an optimized solution ready for direct implementation. I. Core Selection Principles and Scenario Adaptation Logic Core Selection Principles Ultra-High Voltage & Current Margin: For power stages interfacing with AC mains (e.g., 3-phase 400V) or generating intermediate high-voltage DC buses, devices must have sufficient voltage rating (e.g., 600V-800V+) and current capability with significant derating to ensure absolute reliability under surge and transients. Minimized Losses & Thermal Noise: Prioritize devices with low saturation voltage (VCEsat for IGBTs) or low on-state resistance (Rds(on) for MOSFETs) and favorable switching characteristics to reduce conduction/switching losses, thereby minimizing heat generation and associated thermal noise that can decohere qubits. Precision & Drive Compatibility: For low-voltage, high-precision analog/digital control circuits, devices must offer low threshold voltage (Vth), low Rds(on) at low gate drive voltages, and matched dual configurations for differential signaling, ensuring precise timing and amplitude control. Package for Power & Thermal Management: Select packages (TO-3P, TO-247, TO220/F, DFN, SC70, SOT) based on power level and thermal management strategy, balancing current handling, thermal impedance, and PCB space in often densely packed and/or cryogenic environments. Scenario Adaptation Logic Based on the distinct power requirements within a quantum computer system, device applications are divided into three primary scenarios: Primary AC-DC & High-Power DC-DC Conversion (Energy Ingress), High-Current Point-of-Load (POL) Conversion (Core Power Delivery), and Precision Bias & Gate Drive Control (Signal Integrity). Device parameters and characteristics are matched accordingly. II. Device Selection Solutions by Scenario Scenario 1: Primary AC-DC & High-Power DC-DC Conversion (1kW-5kW+) – Energy Ingress Device Recommended Model: VBPB16I80 (IGBT+FRD, 600/650V, 80A, TO-3P) Key Parameter Advantages: Features Field Stop (FS) technology, offering a low VCEsat of 1.7V @15V drive and high current rating of 80A. The integrated fast recovery diode (FRD) simplifies circuit design and improves reliability in hard-switching topologies. Scenario Adaptation Value: The high-voltage, high-current rating and robust TO-3P package make it ideal for the primary power factor correction (PFC) stage or high-power isolated DC-DC converters (e.g., LLC) that generate stable high-voltage DC buses (e.g., 400V) from the mains. Its efficiency and ruggedness ensure minimal energy loss and maximum uptime for the entire system's power backbone. Applicable Scenarios: Three-phase PFC circuits, high-power offline SMPS primary side, high-voltage DC bus generation. Scenario 2: High-Current, Low-Voltage Point-of-Load (POL) Conversion – Core Power Delivery Device Recommended Model: VBGP1121N (Single-N MOSFET, 120V, 100A, TO-247) Key Parameter Advantages: Utilizes advanced Shielded Gate Trench (SGT) technology, achieving an ultra-low Rds(on) of 11mΩ at 10V gate drive. The 100A continuous current rating and 120V VDS are perfectly suited for high-current, non-isolated POL converters (e.g., multi-phase buck converters) stepping down from a 48V or 12V intermediate bus. Scenario Adaptation Value: The extremely low conduction loss minimizes voltage drop and power dissipation when delivering tens to hundreds of amps to ASICs, FPGAs, and classical compute clusters within the quantum computer. The TO-247 package facilitates excellent heat dissipation via heatsinks, critical for maintaining junction temperature and reducing thermal noise near sensitive quantum electronics. Applicable Scenarios: High-current multi-phase VRMs for CPU/GPU/FPGA, low-voltage high-current DC-DC buck converters. Scenario 3: Precision Bias, Gate Drive, & Low-Noise Analog Switching – Signal Integrity Device Recommended Model: VBK3215N (Dual N+N MOSFET, 20V, 2.6A per Ch, SC70-6) Key Parameter Advantages: A dual N-channel configuration with excellent parameter matching (critical for differential pairs). Features a low gate threshold voltage (Vth: 0.5-1.5V) and very low Rds(on) (86mΩ @ 4.5V, 110mΩ @ 2.5V), enabling efficient switching driven directly by low-voltage CMOS logic (3.3V/2.5V). Scenario Adaptation Value: The tiny SC70-6 package and matched dual channels are ideal for space-constrained, high-precision analog circuits. It can be used for low-noise bias switching for qubit control lines, precise enabling/disabling of low-power subsystems, or as a high-speed switch in gate drive circuits for the larger IGBTs/MOSFETs. Its low charge injection minimizes disturbances in sensitive analog paths. Applicable Scenarios: Precision analog signal routing/switching, low-side gate drive for power stages, low-noise bias supplies for qubit control electronics, power sequencing for sensitive ICs. III. System-Level Design Implementation Points Drive Circuit Design VBPB16I80: Requires a dedicated IGBT gate driver IC capable of delivering sufficient peak current (e.g., 2A+). Careful attention to negative gate bias (during off-state) and turn-off speed control is needed to manage EMI and switching losses. VBGP1121N: Pair with a high-current MOSFET driver. Minimize power loop inductance in the PCB layout. Use a gate resistor to control switching speed and mitigate ringing. VBK3215N: Can be driven directly by low-voltage MCU GPIO or analog switches. Ensure clean, low-inductance gate connections. May require small series resistors for impedance matching in RF-sensitive lines. Thermal Management Design Graded Strategy: VBGP1121N and VBPB16I80 will require substantial heatsinking, potentially with forced air or liquid cooling, depending on power level. VBK3215N dissipates very little power and relies on PCB copper pour. Cryogenic Considerations: If any stage operates in a cryogenic environment, device characteristics (Rds(on), Vth) will change significantly. Selection and characterization at target temperature are crucial. Derating: Apply conservative derating (e.g., 50-60% of rated current for continuous operation) to ensure long-term reliability and minimal parameter drift. EMC & Reliability Assurance Noise Suppression: Use snubber circuits across VBPB16I80 and VBGP1121N to dampen voltage spikes. Employ low-ESR/ESL capacitors at POL inputs/outputs. Implement strict grounding and shielding for analog sections using VBK3215N. Protection: Implement comprehensive overcurrent, overvoltage, and overtemperature protection for all power stages. Use TVS diodes and RC buffers on gate drives to protect against ESD and voltage transients. Ensure fault containment to prevent cascade failures. IV. Core Value of the Solution and Optimization Suggestions The power device selection solution for AI quantum computers proposed herein, based on scenario adaptation logic, achieves comprehensive coverage from high-power AC ingress to ultra-precise low-level signal control. Its core value is threefold: 1. Full-Link Efficiency & Stability Optimization: By matching the optimal device technology (IGBT FS, MOSFET SGT, Trench) to each power conversion stage, losses are minimized throughout the chain. This improves overall system efficiency (reducing cooling demands) and, more importantly, enhances the stability of delivered voltages and currents, which is paramount for qubit coherence and classical compute reliability. 2. Balancing High Power with Ultra-Precision: The solution bridges the gap between kilowatt-level power handling (VBPB16I80, VBGP1121N) and milliwatt-level precision control (VBK3215N). This enables the design of power systems that are both robust enough to drive demanding loads and delicate enough to interface with noise-sensitive quantum hardware, facilitating the co-integration of classical and quantum processing units. 3. Foundation for Scalability and Reliability: The selected devices offer proven performance, electrical margins, and package options suitable for scalable power architectures. Combined with rigorous thermal and protection design, they form a reliable hardware foundation for quantum computers that must operate 24/7. This focus on mature, high-reliability components mitigates risk compared to cutting-edge but unproven alternatives, accelerating development cycles. In the power system design for AI quantum computers, the selection of IGBTs and MOSFETs is a critical enabler for achieving the necessary scale, stability, and precision. This scenario-based selection guide, by accurately aligning device capabilities with subsystem requirements and integrating key drive, thermal, and protection strategies, provides a actionable technical roadmap. As quantum computers evolve towards higher qubit counts and greater integration, power device selection will increasingly focus on deeper co-design with control algorithms and cryogenic engineering. Future exploration should target the application of wide-bandgap devices (SiC, GaN) for higher-frequency, higher-efficiency front-end stages, and the development of highly integrated, digitally managed power modules, laying a solid hardware foundation for the next generation of scalable, practical AI quantum computing systems.
graph LR
subgraph "Three-Phase PFC Stage"
A["Three-Phase 400VAC Input"] --> B["EMI Filter & Surge Protection"]
B --> C["Three-Phase Rectifier"]
C --> D["PFC Boost Inductor"]
D --> E["PFC Controller"]
E --> F["Gate Driver"]
F --> G["VBPB16I80 IGBT Array 600/650V, 80A, TO-3P"]
G --> H["High-Voltage DC Bus ~400VDC"]
I["Current Feedback"] --> E
J["Voltage Feedback"] --> E
end
subgraph "LLC Resonant DC-DC Converter"
H --> K["LLC Resonant Tank"]
K --> L["High-Frequency Transformer"]
L --> M["LLC Controller"]
M --> N["Gate Driver"]
N --> O["VBPB16I80 IGBT Array 600/650V, 80A, TO-3P"]
O --> P["Intermediate DC Bus 48V/12V"]
Q["Resonant Current Sense"] --> M
R["Output Voltage Sense"] --> M
end
subgraph "Drive & Protection"
S["Isolated Power Supply"] --> F
S --> N
T["Snubber Circuit"] --> G
T --> O
U["TVS Protection"] --> F
U --> N
end
style G fill:#e8f5e8,stroke:#4caf50,stroke-width:2px
style O fill:#e8f5e8,stroke:#4caf50,stroke-width:2px
High-Current Point-of-Load Conversion Detail
graph LR
subgraph "Multi-Phase Buck Converter Architecture"
A["48V/12V Intermediate Bus"] --> B["Input Capacitor Bank"]
B --> C["Multi-Phase Controller"]
C --> D["Phase 1: High-Side Driver"]
C --> E["Phase 2: High-Side Driver"]
C --> F["Phase 3: High-Side Driver"]
D --> G["VBGP1121N High-Side MOSFET 120V, 100A, 11mΩ, TO-247"]
E --> H["VBGP1121N High-Side MOSFET 120V, 100A, 11mΩ, TO-247"]
F --> I["VBGP1121N High-Side MOSFET 120V, 100A, 11mΩ, TO-247"]
C --> J["Phase 1: Low-Side Driver"]
C --> K["Phase 2: Low-Side Driver"]
C --> L["Phase 3: Low-Side Driver"]
J --> M["VBGP1121N Low-Side MOSFET 120V, 100A, 11mΩ, TO-247"]
K --> N["VBGP1121N Low-Side MOSFET 120V, 100A, 11mΩ, TO-247"]
L --> O["VBGP1121N Low-Side MOSFET 120V, 100A, 11mΩ, TO-247"]
G --> P["Phase 1 Inductor"]
H --> Q["Phase 2 Inductor"]
I --> R["Phase 3 Inductor"]
M --> S["Phase 1 Output"]
N --> T["Phase 2 Output"]
O --> U["Phase 3 Output"]
P --> V["Output Capacitor Array"]
Q --> V
R --> V
S --> V
T --> V
U --> V
V --> W["Core Power Rail 0.8-1.2V @ 100-500A"]
end
subgraph "Load Monitoring & Protection"
X["Current Sense Amplifiers"] --> C
Y["Voltage Monitoring ADC"] --> C
Z["Temperature Sensors"] --> C
AA["Overcurrent Protection"] --> C
AB["Overvoltage Protection"] --> C
end
style G fill:#e3f2fd,stroke:#2196f3,stroke-width:2px
style M fill:#e3f2fd,stroke:#2196f3,stroke-width:2px
Precision Bias & Control Circuits Detail
graph LR
subgraph "Precision Bias Switching for Qubit Control"
A["Ultra-Low-Noise Precision Power Supply"] --> B["Low-Pass Filter Network"]
B --> C["VBK3215N Dual MOSFET Switch 20V, 2.6A, SC70-6"]
C --> D["Programmable Bias Voltage ±10mV Accuracy"]
D --> E["Cryogenic RF Lines"]
E --> F["Qubit Control Electrodes"]
G["Digital Control Logic"] --> H["Level Translator"]
H --> I["VBK3215N Gate Drive"]
I --> C
end
subgraph "Analog Signal Routing Matrix"
J["Multiple Analog Sources"] --> K["VBK3215N Switch Matrix"]
L["Control Signals"] --> M["Switch Controller"]
M --> N["VBK3215N Gate Drivers"]
N --> K
K --> O["Analog Output Multiplexer"]
O --> P["ADC Inputs & Control System Inputs"]
end
subgraph "Gate Drive Interface for Power Stages"
Q["3.3V/2.5V CMOS Logic"] --> R["VBK3215N Level Shifter"]
R --> S["High-Speed Buffer"]
S --> T["Gate Driver IC"]
T --> U["Power MOSFET/IGBT Gates"]
end
subgraph "Thermal & Layout Considerations"
V["PCB Thermal Vias"] --> C
V --> K
V --> R
W["Ground Plane Isolation"] --> X["Analog Ground"]
W --> Y["Digital Ground"]
W --> Z["Power Ground"]
end
style C fill:#fff3e0,stroke:#ff9800,stroke-width:2px
style K fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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