MOSFET Selection Strategy and Device Adaptation Handbook for AI Liquid Cooling CDUs with High-Efficiency and Reliability Requirements
AI Liquid Cooling CDU MOSFET Topology Diagrams
AI Liquid Cooling CDU Overall Power System Topology
graph LR
%% Power Input & Distribution Section
subgraph "AC Input & Primary Power Distribution"
AC_IN["Three-Phase 400VAC Input Data Center Power"] --> EMI_FILTER["EMI/EMC Filter with Surge Protection"]
EMI_FILTER --> RECTIFIER["Three-Phase Rectifier"]
RECTIFIER --> DC_BUS["High-Voltage DC Bus ~400-480VDC"]
end
%% Main Power Conversion Modules
subgraph "Core Power Conversion Stages"
DC_BUS --> PFC_STAGE["PFC Stage (Optional)"]
PFC_STAGE --> HV_BUS["Stabilized HV DC Bus"]
HV_BUS --> PUMP_INVERTER["Pump Motor Inverter 3-Phase Bridge"]
HV_BUS --> AUX_CONVERTER["Auxiliary DC-DC Converter 12V/24V/48V"]
end
%% Load Drive Sections
subgraph "Main Circulation Pump Drive (1-5kW+)"
PUMP_INVERTER --> subgraph "Inverter Bridge"
Q_PUMP1["VBP19R25S 900V/25A"]
Q_PUMP2["VBP19R25S 900V/25A"]
Q_PUMP3["VBP19R25S 900V/25A"]
Q_PUMP4["VBP19R25S 900V/25A"]
Q_PUMP5["VBP19R25S 900V/25A"]
Q_PUMP6["VBP19R25S 900V/25A"]
end
subgraph "Motor & Control"
MOTOR["Centrifugal Pump 3-Phase Motor"]
DRIVER["High-Voltage Gate Driver IR2110/ISO5851"]
end
Q_PUMP1 --> MOTOR
Q_PUMP2 --> MOTOR
Q_PUMP3 --> MOTOR
Q_PUMP4 --> MOTOR
Q_PUMP5 --> MOTOR
Q_PUMP6 --> MOTOR
DRIVER --> Q_PUMP1
DRIVER --> Q_PUMP2
DRIVER --> Q_PUMP3
DRIVER --> Q_PUMP4
DRIVER --> Q_PUMP5
DRIVER --> Q_PUMP6
end
subgraph "Solenoid Valve Control (50-300W)"
AUX_CONVERTER --> VALVE_POWER["Valve Power Rail"]
VALVE_POWER --> subgraph "Valve Switch Array"
Q_VALVE1["VBM185R07 850V/7A"]
Q_VALVE2["VBM185R07 850V/7A"]
Q_VALVE3["VBM185R07 850V/7A"]
Q_VALVE4["VBM185R07 850V/7A"]
end
Q_VALVE1 --> VALVE1["Coolant Flow Valve"]
Q_VALVE2 --> VALVE2["Bypass Valve"]
Q_VALVE3 --> VALVE3["Isolation Valve"]
Q_VALVE4 --> VALVE4["Emergency Shut-off"]
VALVE_DRIVER["Valve Driver Circuit"] --> Q_VALVE1
VALVE_DRIVER --> Q_VALVE2
VALVE_DRIVER --> Q_VALVE3
VALVE_DRIVER --> Q_VALVE4
end
subgraph "Auxiliary Fan Drive (50-200W)"
AUX_CONVERTER --> FAN_POWER["Fan Power Rail"]
FAN_POWER --> subgraph "Fan Switch Array"
Q_FAN1["VBL16R20S 600V/20A"]
Q_FAN2["VBL16R20S 600V/20A"]
Q_FAN3["VBL16R20S 600V/20A"]
end
Q_FAN1 --> FAN1["Heat Exchanger Fan"]
Q_FAN2 --> FAN2["Control Cabinet Fan"]
Q_FAN3 --> FAN3["Backup Cooling Fan"]
FAN_DRIVER["Fan PWM Controller"] --> Q_FAN1
FAN_DRIVER --> Q_FAN2
FAN_DRIVER --> Q_FAN3
end
%% Control & Monitoring System
subgraph "Intelligent Control & Monitoring"
MCU["Main Control MCU with Thermal Algorithm"] --> subgraph "Sensor Inputs"
TEMP_SENSORS["NTC/PTC Temperature Sensors (Multiple)"]
FLOW_SENSORS["Flow Rate Sensors"]
PRESSURE_SENSORS["Pressure Transducers"]
CURRENT_SENSE["High-Precision Current Monitoring"]
end
MCU --> PUMP_CONTROLLER["Pump Speed Controller"]
MCU --> VALVE_CONTROLLER["Valve Sequencing Logic"]
MCU --> FAN_CONTROLLER["Fan Speed Controller"]
MCU --> PROTECTION["Protection & Fault Management"]
end
%% Thermal Management
subgraph "Three-Level Thermal Management"
subgraph "Level 1: Pump MOSFET Cooling"
HEATSINK_PUMP["Isolated Heatsink with Forced Airflow"] --> Q_PUMP1
HEATSINK_PUMP --> Q_PUMP2
end
subgraph "Level 2: Valve/Fan MOSFET Cooling"
HEATSINK_VALVE["PCB Heatsink Bar or Chassis Mount"] --> Q_VALVE1
HEATSINK_VALVE --> Q_VALVE2
HEATSINK_FAN["PCB Thermal Pad with Vias"] --> Q_FAN1
HEATSINK_FAN --> Q_FAN2
end
subgraph "Level 3: Control IC Cooling"
COOLING_CONTROL["Natural Convection + Airflow"] --> MCU
COOLING_CONTROL --> DRIVER
end
end
%% Protection & Communication
subgraph "Protection & Communication Interface"
subgraph "Electrical Protection"
SNUBBERS["RC/RCD Snubber Circuits"]
TVS_ARRAY["TVS Diode Array SMCJ Series"]
VARISTORS["MOV Surge Protection"]
DESAT_PROT["Desaturation Detection"]
end
subgraph "Communication Interfaces"
CAN_BUS["CAN Bus to Data Center BMS"]
ETHERNET["Ethernet/IP Cloud Connectivity"]
MODBUS["Modbus RTU/TCP Local Control"]
end
SNUBBERS --> Q_PUMP1
TVS_ARRAY --> DC_BUS
VARISTORS --> AC_IN
DESAT_PROT --> Q_PUMP1
MCU --> CAN_BUS
MCU --> ETHERNET
MCU --> MODBUS
end
%% Style Definitions
style Q_PUMP1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px
style Q_VALVE1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px
style Q_FAN1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px
style MCU fill:#fce4ec,stroke:#e91e63,stroke-width:2px
With the rapid advancement of high-density computing and AI data centers, Cold Distribution Units (CDUs) serving as the core of liquid cooling systems have become critical for ensuring precise thermal management. The power conversion and pump/fan/valve drive systems, acting as the "heart and actuators" of the entire unit, provide robust and efficient power delivery to key loads such as centrifugal pumps, control valves, and auxiliary fans. The selection of power MOSFETs directly dictates system efficiency, power density, thermal performance, and ultimate reliability. Addressing the stringent requirements of CDUs for 24/7 operation, high energy efficiency, compactness, and fault resilience, this article focuses on scenario-based adaptation to develop a practical and optimized MOSFET selection strategy. I. Core Selection Principles and Scenario Adaptation Logic (A) Core Selection Principles: Four-Dimensional Collaborative Adaptation MOSFET selection requires coordinated adaptation across four dimensions—voltage, loss, package, and reliability—ensuring precise matching with harsh data center operating conditions: Sufficient High-Voltage Margin: For common PFC or direct rectified AC-DC bus voltages (e.g., ~400V DC), prioritize devices with rated voltages ≥600V. A margin of 50-100% above the peak bus voltage is critical to handle switching voltage spikes and grid transients. Prioritize Low Loss for 24/7 Operation: Prioritize low Rds(on) to minimize conduction loss in continuously running pumps. For switching applications (valves, fans), prioritize low Qg and Qrr to reduce switching loss and improve efficiency, directly lowering operational TCO. Package Matching for Power Density and Cooling: Choose high-power packages like TO-247 or TO-263 for main pump drives, offering excellent thermal performance. For auxiliary drives, compact packages like TO-220 or TO-220F balance space constraints with adequate heat dissipation. Reliability Redundancy for Critical Infrastructure: Focus on robust junction temperature range (typically -55°C ~ 150°C), high avalanche energy rating, and proven long-term reliability under continuous thermal stress to meet data center uptime mandates. (B) Scenario Adaptation Logic: Categorization by Load Type Divide loads into three core functional scenarios: First, Main Circulation Pump Drive (power core), requiring high-voltage, high-current, and ultra-reliable operation. Second, Solenoid Valve & Control Actuator Drive (precision control), requiring medium-power handling and fast, reliable switching for flow regulation. Third, Auxiliary Fan Drive (thermal support), requiring efficient medium-power switching in a compact footprint. II. Detailed MOSFET Selection Scheme by Scenario (A) Scenario 1: Main Circulation Pump Drive (1kW-5kW+) – Power Core Device Centrifugal pumps in CDUs require handling high continuous currents and startup surges at elevated DC bus voltages, demanding high-voltage, high-efficiency, and rugged devices. Recommended Model: VBP19R25S (Single-N, 900V, 25A, TO-247) Parameter Advantages: Utilizes advanced SJ_Multi-EPI (Super-Junction) technology, achieving a very low Rds(on) of 138mΩ at 10V for its voltage class. The 900V VDS provides substantial margin for 400V-480V AC line applications. The 25A continuous current rating and robust TO-247 package are ideal for high-power motor drives. Adaptation Value: Significantly reduces conduction loss in the pump inverter bridge. Enables high-efficiency, high-frequency switching (>20kHz) for precise pump speed control, contributing to overall CDU PUE optimization. The high voltage rating ensures robustness against line disturbances. Selection Notes: Verify pump motor power and peak current requirements. Pair with dedicated high-voltage gate driver ICs (e.g., IR2110, ISO5851) with sufficient drive current. Implement comprehensive overcurrent and overtemperature protection in the driver stage. (B) Scenario 2: Solenoid Valve & Control Actuator Drive (50W-300W) – Precision Control Device Solenoid valves for flow regulation require reliable high-side or low-side switching, handling inductive kickback, and enabling fast response for precise thermal control algorithms. Recommended Model: VBM185R07 (Single-N, 850V, 7A, TO-220) Parameter Advantages: 850V VDS offers excellent margin for high-voltage bus switching. 7A ID is ample for most industrial solenoid valves. The planar technology offers a good cost-performance ratio. The TO-220 package is widely used, easy to mount, and offers good thermal performance with a heatsink. Adaptation Value: Enables direct ON/OFF or PWM control of coolant flow paths. Supports fast valve actuation (<50ms) for dynamic load following. The package allows for cost-effective implementation across multiple valve channels. Selection Notes: Calculate inrush and holding current of the solenoid. Implement necessary freewheeling diodes or RC snubbers across the valve coil to manage voltage spikes. For high-side switching, use appropriate level-shifting or bootstrap gate drivers. (C) Scenario 3: Auxiliary Fan Drive (50W-200W) – Thermal Support Device Auxiliary fans for cooling control electronics or heat exchangers require efficient switching, often in space-constrained areas of the CDU controller. Recommended Model: VBL16R20S (Single-N, 600V, 20A, TO-263 (D2PAK)) Parameter Advantages: SJ_Multi-EPI technology provides a low Rds(on) of 190mΩ at 10V, minimizing conduction loss. 600V VDS is suitable for lower-voltage bus derivatives or as a robust choice for general high-voltage switching. The TO-263 package offers superior thermal performance to TO-220 in a surface-mount format, saving vertical space. Adaptation Value: Provides high efficiency for fan speed control via PWM. The surface-mount package aids in achieving higher PCB power density and automated assembly. Excellent thermal characteristics help manage heat in enclosed spaces. Selection Notes: Ensure the fan's locked-rotor current is within the device's safe operating area (SOA). Use a gate resistor to control switching speed and mitigate EMI. A small heatsink on the package tab may be required for continuous full-load operation. III. System-Level Design Implementation Points (A) Drive Circuit Design: Matching Device Characteristics VBP19R25S: Requires a high-voltage gate driver with peak output current >2A for fast switching. Use low-inductance gate drive loops. Consider Miller clamp techniques to prevent parasitic turn-on. VBM185R07: Can be driven by medium-power gate driver outputs or discrete push-pull stages. Include a series gate resistor (10-47Ω) to damp ringing. VBL16R20S: Compatible with standard gate driver ICs. Ensure the PCB pad (drain tab) has sufficient copper area for heat dissipation as per datasheet recommendations. (B) Thermal Management Design: Tiered Heat Dissipation VBP19R25S (TO-247): Mandatory use of an isolated heatsink. Apply thermal interface material. Consider forced airflow from system fans over the heatsink. VBM185R07 (TO-220): Attach to a chassis-mounted heatsink or a dedicated PCB heatsink bar for multi-device layouts, especially when switching multiple valves simultaneously. VBL16R20S (TO-263): Design a large, exposed copper pad on the PCB with multiple thermal vias connecting to internal ground/power planes for heat spreading. Overall: Position high-power devices in the main cooling airflow path. Monitor heatsink temperature with NTC thermistors for predictive fan control. (C) EMC and Reliability Assurance EMC Suppression: Use RC snubbers across drain-source of switching devices (VBM185R07, VBL16R20S) to damp high-frequency ringing. Place high-frequency decoupling capacitors (100nF ceramic) very close to the drain and source pins. Use ferrite beads in series with gate drive paths and power supply inputs to sensitive control circuits. Reliability Protection: Derating: Operate all MOSFETs at ≤70-80% of their rated voltage and current under worst-case temperature conditions. Overcurrent Protection: Implement desaturation detection for VBP19R25S in the pump drive. Use current sense resistors and comparators for valve and fan drives. Transient Protection: Place TVS diodes (SMCJ series) at the DC bus input and across inductive load terminals. Use varistors at AC input for surge protection. IV. Scheme Core Value and Optimization Suggestions (A) Core Value High-Efficiency Power Conversion: SJ_Multi-EPI devices (VBP19R25S, VBL16R20S) minimize losses in critical 24/7 loads, directly improving CDU efficiency and reducing energy costs. Robustness for Critical Infrastructure: High voltage ratings and rugged packages ensure system resilience against power anomalies, maximizing MTBF. Scalable and Serviceable Design: The use of standard, widely available packages (TO-247, TO-220, TO-263) simplifies prototyping, manufacturing, and field service. (B) Optimization Suggestions Power Scaling: For even higher power pump drives (>5kW), consider paralleling VBP19R25S or selecting a higher-current SJ-MOSFET like VBM16R43S (600V, 43A, TO-220). Space-Constrained Valves: For very high-density valve control boards, the VBMB18R07S (800V, 7A, TO-220F) offers a fully isolated package, saving the cost and space of insulation pads. Cost-Optimized Fans: For lower-voltage auxiliary fans (e.g., 48V bus), the VBM1310 (30V, 80A, Trench) offers exceptionally low Rds(on) for maximum efficiency, though it requires a separate, lower-voltage power domain. Conclusion Power MOSFET selection is central to achieving the high efficiency, power density, and legendary reliability demanded by AI data center liquid cooling CDUs. This scenario-based scheme, leveraging high-voltage SJ and planar technologies, provides targeted technical guidance for R&D through precise load matching and robust system-level design. Future exploration can focus on integrated driver-MOSFET modules (IPMs) and wide-bandgap (SiC) devices for the next frontier in power density and efficiency, solidifying the thermal management foundation for AI compute.
Detailed Topology Diagrams
Main Circulation Pump Inverter Drive Topology
graph LR
subgraph "Three-Phase Inverter Bridge"
HV_BUS["HV DC Bus (400-480V)"] --> Q_UH["VBP19R25S High-Side U"]
HV_BUS --> Q_VH["VBP19R25S High-Side V"]
HV_BUS --> Q_WH["VBP19R25S High-Side W"]
Q_UL["VBP19R25S Low-Side U"] --> GND1
Q_VL["VBP19R25S Low-Side V"] --> GND2
Q_WL["VBP19R25S Low-Side W"] --> GND3
end
subgraph "Gate Drive & Protection"
DRIVER_IC["High-Voltage Gate Driver IR2110/ISO5851"] --> subgraph "Drive Signals"
HO_U["High-Side U Drive"]
LO_U["Low-Side U Drive"]
HO_V["High-Side V Drive"]
LO_V["Low-Side V Drive"]
HO_W["High-Side W Drive"]
LO_W["Low-Side W Drive"]
end
HO_U --> Q_UH
LO_U --> Q_UL
HO_V --> Q_VH
LO_V --> Q_VL
HO_W --> Q_WH
LO_W --> Q_WL
subgraph "Protection Circuits"
DESAT["Desaturation Detection Circuit"] --> DRIVER_IC
CURRENT_SHUNT["Current Sense Shunt Resistor"] --> COMPARATOR["Overcurrent Comparator"]
COMPARATOR --> FAULT["Fault Latch"]
THERMAL["Thermal Sensor on Heatsink"] --> MCU["MCU"]
end
end
subgraph "Motor & Control Interface"
Q_UH --> U_PHASE["U Phase Output"]
Q_UL --> U_PHASE
Q_VH --> V_PHASE["V Phase Output"]
Q_VL --> V_PHASE
Q_WH --> W_PHASE["W Phase Output"]
Q_WL --> W_PHASE
U_PHASE --> MOTOR["3-Phase Centrifugal Pump Motor"]
V_PHASE --> MOTOR
W_PHASE --> MOTOR
MCU --> PWM_GEN["PWM Generator"]
PWM_GEN --> DRIVER_IC
MCU --> SPEED_FB["Speed Feedback Encoder/Hall"]
end
style Q_UH fill:#e8f5e8,stroke:#4caf50,stroke-width:2px
style DRIVER_IC fill:#fce4ec,stroke:#e91e63,stroke-width:2px
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