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MOSFET Selection Strategy and Device Adaptation Handbook for AI Education Cloud Servers with High-Efficiency and Reliability Requirements
AI Education Cloud Server MOSFET Selection Topology Diagram

AI Education Cloud Server Power System Overall Topology Diagram

graph LR %% Input Power Stage subgraph "AC-DC Front End & High-Voltage Power Conversion" AC_IN["Three-Phase 400VAC Input"] --> EMI_FILTER["EMI Filter"] EMI_FILTER --> RECTIFIER["Three-Phase Rectifier Bridge"] RECTIFIER --> PFC_CIRCUIT["PFC Boost Circuit"] subgraph "High-Voltage MOSFET Array" Q_PFC1["VBN165R13S
650V/13A
TO262"] Q_PFC2["VBN165R13S
650V/13A
TO262"] end PFC_CIRCUIT --> Q_PFC1 PFC_CIRCUIT --> Q_PFC2 Q_PFC1 --> HV_BUS["400V High-Voltage DC Bus"] Q_PFC2 --> HV_BUS HV_BUS --> DC_DC_CONV["DC-DC Converter"] DC_DC_CONV --> INT_BUS["12V/48V Intermediate Bus"] end %% CPU/GPU Voltage Regulation subgraph "CPU/GPU Voltage Regulation Module (VRM)" INT_BUS --> VRM_CONTROLLER["Multi-Phase VRM Controller
IR35201"] subgraph "High-Current MOSFET Array" Q_VRM1["VBMB1303
30V/140A
TO220F"] Q_VRM2["VBMB1303
30V/140A
TO220F"] Q_VRM3["VBMB1303
30V/140A
TO220F"] Q_VRM4["VBMB1303
30V/140A
TO220F"] end VRM_CONTROLLER --> Q_VRM1 VRM_CONTROLLER --> Q_VRM2 VRM_CONTROLLER --> Q_VRM3 VRM_CONTROLLER --> Q_VRM4 Q_VRM1 --> CPU_VCC["CPU Core Power
0.8-1.5V"] Q_VRM2 --> CPU_VCC Q_VRM3 --> GPU_VCC["GPU Core Power
0.8-1.5V"] Q_VRM4 --> GPU_VCC CPU_VCC --> AI_CPU["AI CPU Processor"] GPU_VCC --> AI_GPU["AI GPU Accelerator"] end %% Cooling System subgraph "Intelligent Cooling System" COOL_CONTROLLER["Cooling PWM Controller
EMC2101"] --> FAN_DRIVER["Fan Drive Circuit"] subgraph "Cooling MOSFET Array" Q_FAN1["VBL1202M
200V/18A
TO263"] Q_FAN2["VBL1202M
200V/18A
TO263"] Q_PUMP["VBL1202M
200V/18A
TO263"] end FAN_DRIVER --> Q_FAN1 FAN_DRIVER --> Q_FAN2 FAN_DRIVER --> Q_PUMP Q_FAN1 --> FAN_48V["48V Cooling Fan"] Q_FAN2 --> FAN_48V Q_PUMP --> PUMP_48V["48V Liquid Cooling Pump"] FAN_48V --> THERMAL_MGMT["Server Thermal Management"] PUMP_48V --> THERMAL_MGMT end %% Protection & Monitoring subgraph "System Protection & Monitoring" subgraph "Protection Circuits" OVP["Overvoltage Protection"] OCP["Overcurrent Protection"] OTP["Overtemperature Protection"] ESD_PROT["ESD/Surge Protection"] end OVP --> PROT_CONTROLLER["Protection Controller"] OCP --> PROT_CONTROLLER OTP --> PROT_CONTROLLER ESD_PROT --> PROT_CONTROLLER PROT_CONTROLLER --> SHUTDOWN_SIGNAL["System Shutdown Signal"] SHUTDOWN_SIGNAL --> Q_PFC1 SHUTDOWN_SIGNAL --> Q_VRM1 SHUTDOWN_SIGNAL --> Q_FAN1 end %% Management & Communication subgraph "System Management & Communication" BMC["Baseboard Management Controller"] --> SENSORS["Temperature Sensors
TMP75"] BMC --> CURRENT_SENSE["Current Sensing Circuits"] BMC --> POWER_MON["Power Monitoring ICs"] BMC --> CLOUD_COMM["Cloud Management Interface"] BMC --> NETWORK["Server Network Interface"] end %% Thermal Management System subgraph "Tiered Thermal Management Architecture" LIQUID_COOL["Liquid Cooling Loop"] --> AI_CPU LIQUID_COOL --> AI_GPU AIR_COOL["Forced Air Cooling"] --> HEATSINK["VRM Heatsink"] HEATSINK --> Q_VRM1 HEATSINK --> Q_VRM2 PASSIVE_COOL["PCB Thermal Design"] --> Q_PFC1 PASSIVE_COOL --> Q_FAN1 end %% Connections & Feedback SENSORS --> BMC CURRENT_SENSE --> BMC POWER_MON --> BMC PROT_CONTROLLER --> BMC THERMAL_MGMT --> SENSORS %% Style Definitions style Q_PFC1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_VRM1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_FAN1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style BMC fill:#fce4ec,stroke:#e91e63,stroke-width:2px

With the rapid growth of AI-driven educational platforms and cloud computing, AI education cloud servers demand robust power management solutions to ensure uninterrupted operation, high power density, and thermal stability. The power delivery and cooling systems, acting as the "lifeblood" of server units, require precise switching for critical loads such as CPU/GPU voltage regulators, PFC stages, and cooling fans. MOSFET selection directly impacts system efficiency, power density, thermal performance, and reliability. Addressing stringent requirements for energy efficiency, heat dissipation, and 24/7 operation, this article develops a scenario-based MOSFET selection strategy for optimized server design.
I. Core Selection Principles and Scenario Adaptation Logic
(A) Core Selection Principles: Four-Dimensional Collaborative Adaptation
MOSFET selection must balance voltage rating, loss characteristics, package suitability, and reliability to match server operating conditions:
- Sufficient Voltage Margin: For AC-DC front ends (e.g., 400V bus), reserve ≥50% voltage margin to handle transients. For low-voltage rails (e.g., 12V/48V), ensure compatibility with overshoot.
- Prioritize Low Loss: Focus on low Rds(on) for conduction loss reduction and low Qg/Coss for switching loss minimization, critical for high-frequency switching and efficiency targets (e.g., >95%).
- Package Matching: Choose packages with low thermal resistance (e.g., TO247, TO263) for high-power stages, and compact packages (e.g., DFN, SOP) for auxiliary circuits to optimize layout and cooling.
- Reliability Redundancy: Ensure junction temperature range (e.g., -55°C~150°C), high avalanche ruggedness, and ESD protection for server-grade durability.
(B) Scenario Adaptation Logic: Categorization by Load Type
Divide server loads into three core scenarios: First, high-voltage power conversion (e.g., PFC, DC-DC), requiring high-voltage blocking and moderate current. Second, CPU/GPU voltage regulation (VRM), demanding ultra-low Rds(on) and high current handling. Third, cooling system drive (fans/pumps), needing medium-voltage and efficient switching for thermal management.
II. Detailed MOSFET Selection Scheme by Scenario
(A) Scenario 1: High-Voltage Power Conversion (PFC/DC-DC) – Front-End Device
Server AC-DC stages (e.g., 400V bus) require 650V+ MOSFETs for power factor correction and isolation, with efficiency critical for energy savings.
- Recommended Model: VBN165R13S (Single-N, 650V, 13A, TO262)
- Parameter Advantages: SJ_Multi-EPI technology enables low Rds(on) of 330mΩ at 10V, balancing switching and conduction loss. 650V rating provides >60% margin for 400V bus. TO262 package offers robust thermal performance (RthJC~0.5°C/W) for heat sinking.
- Adaptation Value: Enables high-frequency PFC operation (e.g., 100kHz) with efficiency >98%, reducing front-end loss by 15-20%. Avalanche ruggedness suits server power supply spikes.
- Selection Notes: Verify bus voltage and peak currents; add snubber circuits for ringing suppression. Use gate drivers with ≥2A capability (e.g., IRS2184). Ensure PCB creepage for high-voltage isolation.
(B) Scenario 2: CPU/GPU Voltage Regulation (VRM) – High-Current Device
VRMs for multi-core AI processors demand ultra-low loss at high currents (e.g., 100A+ per phase) to minimize thermal stress and maintain voltage accuracy.
- Recommended Model: VBMB1303 (Single-N, 30V, 140A, TO220F)
- Parameter Advantages: Trench technology achieves Rds(on) as low as 4mΩ at 10V, enabling minimal conduction loss. 140A continuous current supports multi-phase VRM designs. TO220F package provides low thermal resistance (RthJA~40°C/W) for direct heatsink attachment.
- Adaptation Value: Reduces VRM loss to <5W per phase at 100A load, boosting overall server efficiency to >96%. Supports high-frequency multiphase operation (500kHz-1MHz) for fast transient response.
- Selection Notes: Pair with multiphase controller ICs (e.g., IR35201). Use parallel devices for higher currents; ensure symmetric layout to balance current sharing. Derate current by 30% at 85°C ambient.
(C) Scenario 3: Cooling System Drive (Fans/Pumps) – Thermal Management Device
Cooling fans (e.g., 48V/200W) require medium-voltage MOSFETs for PWM control, ensuring quiet operation and adaptive thermal management.
- Recommended Model: VBL1202M (Single-N, 200V, 18A, TO263)
- Parameter Advantages: 200V rating suits 48V bus with >75% margin for inductive spikes. Rds(on) of 180mΩ at 10V minimizes conduction loss. TO263 package offers low parasitic inductance and thermal resistance (RthJC~1°C/W) for compact cooling solutions.
- Adaptation Value: Enables 20-50kHz PWM fan control, reducing acoustic noise to <40dB. Efficient switching cuts cooling system power loss by 10%, aiding server PUE optimization.
- Selection Notes: Match fan power (e.g., 18A supports up to 300W at 48V). Add freewheeling diodes for inductive loads. Use fan driver ICs with tachometer feedback for speed regulation.
III. System-Level Design Implementation Points
(A) Drive Circuit Design: Matching Device Characteristics
- VBN165R13S: Pair with isolated gate drivers (e.g., Si8234) for high-side switching; add 4.7Ω gate resistor and 1nF gate-source capacitor to damp oscillations.
- VBMB1303: Drive with high-current gate drivers (e.g., LM5114) capable of 5A peak; use Kelvin connection for gate sensing to avoid noise. Add 10nF bootstrap capacitor for high-side operation.
- VBL1202M: Direct drive by PWM controller (e.g., EMC2101) with 22Ω gate series resistor; include 100pF snubber across drain-source for EMI reduction.
(B) Thermal Management Design: Tiered Heat Dissipation
- VBN165R13S: Mount on aluminum heatsink with thermal pad; ensure ≥300mm² copper pour on PCB with thermal vias for junction temperature <100°C.
- VBMB1303: Use forced-air cooling with heatsink (RthSA<2°C/W); maintain airflow >200 LFM over package. Derate current to 70% above 70°C ambient.
- VBL1202M: Attach to chassis via thermal tape; provide ≥150mm² copper pour on PCB. Place near server exhaust for convective cooling.
(C) EMC and Reliability Assurance
- EMC Suppression:
- VBN165R13S: Add 470pF Coss capacitor and common-mode choke at input. Use shielded magnetics for transformer isolation.
- VBMB1303: Implement LC filters on VRM output; add ferrite beads on gate traces to suppress high-frequency noise.
- VBL1202M: Include RC snubber (10Ω+2.2nF) across fan terminals; place EMI filter at PWM output.
- Reliability Protection:
- Derating Design: Operate VBN165R13S at ≤80% of VDS rating; limit VBMB1303 current to 60% at 100°C junction.
- Overcurrent/Overtemperature Protection: Use current sense resistors with comparators for VRM; integrate thermal sensors (e.g., TMP75) near MOSFETs.
- ESD/Surge Protection: Add TVS diodes (e.g., SMAJ400A) at AC input; use gate-source Zeners (12V) for all MOSFETs.
IV. Scheme Core Value and Optimization Suggestions
(A) Core Value
- High Efficiency and Power Density: System efficiency reaches >96%, reducing energy costs by 15% and enabling compact 1U/2U server designs.
- Enhanced Thermal Performance: Optimized cooling control extends component lifespan and ensures stable AI workload processing.
- Server-Grade Reliability: SJ_Multi-EPI and Trench technologies provide avalanche robustness, supporting 24/7 operation with MTBF >100,000 hours.
(B) Optimization Suggestions
- Power Scaling: For higher power PFC (>1kW), upgrade to VBP165R15S (650V, 15A). For multi-phase VRMs, parallel VBMB1303 devices with current sharing.
- Integration Upgrade: Use DrMOS modules for VRM simplification; select VBA4670 (Dual-P+P) for redundant power switching.
- Special Scenarios: For edge servers with wide temperature ranges, choose VBN165R13S with extended junction rating (-55°C~175°C). For noise-sensitive environments, pair VBL1202M with hydrodynamic bearing fans.
- Advanced Cooling: Integrate VBL1202M with liquid cooling pumps using PID control for dynamic thermal management.
Conclusion
MOSFET selection is pivotal for achieving high efficiency, thermal resilience, and reliability in AI education cloud servers. This scenario-based strategy enables precise adaptation to power conversion, VRM, and cooling needs through tailored device selection and system design. Future advancements in SiC MOSFETs and integrated power modules can further boost performance, supporting next-generation server architectures for scalable AI education infrastructure.

Detailed MOSFET Selection Topology Diagrams

High-Voltage Power Conversion (PFC/DC-DC) MOSFET Topology

graph LR subgraph "Three-Phase PFC Stage" A[Three-Phase 400VAC] --> B[EMI Filter] B --> C[Rectifier Bridge] C --> D[PFC Inductor] D --> E[PFC Switching Node] E --> F["VBN165R13S
650V/13A
TO262"] F --> G[400V DC Bus] H[PFC Controller] --> I[Gate Driver
Si8234] I --> F J[Gate Resistor 4.7Ω] --> F K[Gate-Source Cap 1nF] --> F end subgraph "Isolated DC-DC Stage" G --> L[DC-DC Converter] L --> M[High-Frequency Transformer] M --> N[Secondary Rectification] N --> O[12V/48V Output] P[DC-DC Controller] --> Q[Gate Driver] Q --> R["VBN165R13S
650V/13A
TO262"] R --> M end subgraph "Protection Circuits" S["TVS Diodes
SMAJ400A"] --> T[AC Input] U["Common Mode Choke"] --> B V["470pF Coss Cap"] --> F end style F fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style R fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

CPU/GPU Voltage Regulation (VRM) MOSFET Topology

graph LR subgraph "Multi-Phase VRM Architecture" A[12V/48V Input] --> B[Multi-Phase Controller
IR35201] B --> C[Phase 1 Driver] B --> D[Phase 2 Driver] B --> E[Phase 3 Driver] B --> F[Phase 4 Driver] C --> G["VBMB1303
High-Side"] C --> H["VBMB1303
Low-Side"] D --> I["VBMB1303
High-Side"] D --> J["VBMB1303
Low-Side"] E --> K["VBMB1303
High-Side"] E --> L["VBMB1303
Low-Side"] F --> M["VBMB1303
High-Side"] F --> N["VBMB1303
Low-Side"] G --> O[Output Inductor] H --> O I --> O J --> O K --> O L --> O M --> O N --> O O --> P[Output Capacitor] P --> Q[CPU/GPU Core Voltage] end subgraph "Drive & Protection" R["High-Current Gate Driver
LM5114"] --> G R --> H S["Bootstrap Cap 10nF"] --> R T["Kelvin Connection"] --> G U["Current Sense Resistor"] --> V[Comparator] V --> W[Overcurrent Protection] X["Thermal Sensor
TMP75"] --> Y[Overtemperature Protection] end subgraph "Thermal Management" Z["Heatsink RthSA<2°C/W"] --> G Z --> H AA["Forced Airflow >200 LFM"] --> Z BB["PCB Copper Pour"] --> G end style G fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style H fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Cooling System Drive MOSFET Topology

graph LR subgraph "PWM Fan Control System" A[PWM Controller
EMC2101] --> B[Gate Drive Circuit] B --> C["VBL1202M
200V/18A
TO263"] C --> D[48V Fan Motor] E[Gate Resistor 22Ω] --> C F[Freewheeling Diode] --> D G[RC Snubber 10Ω+2.2nF] --> D end subgraph "Liquid Cooling Pump Control" H[PWM Controller] --> I[Gate Drive Circuit] I --> J["VBL1202M
200V/18A
TO263"] J --> K[48V Pump Motor] L[PID Controller] --> H end subgraph "Thermal Feedback Loop" M[Temperature Sensors] --> N[BMC] N --> O[PWM Duty Cycle Calculation] O --> A O --> H P[Tachometer Feedback] --> A Q[Flow Rate Sensor] --> H end subgraph "Thermal Management" R["Thermal Tape"] --> C S["PCB Copper Pour ≥150mm²"] --> C T["Server Exhaust Placement"] --> C U["Liquid Cooling Plate"] --> J end style C fill:#fff3e0,stroke:#ff9800,stroke-width:2px style J fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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