With the global push for industrial energy efficiency and the need for stable power quality, energy storage systems (ESS) have become a critical infrastructure for modern high-end paper mills, ensuring uninterrupted production and peak shaving. The power conversion and management subsystems, serving as the "heart and muscles" of the ESS, provide precise control for key functions like bidirectional inverters, battery management DC-DC converters, and auxiliary power supplies. The selection of power MOSFETs directly determines system efficiency, power density, thermal performance, and long-term reliability. Addressing the stringent requirements of paper mills for 24/7 operation, high efficiency, robustness, and safety, this article focuses on scenario-based adaptation to develop a practical and optimized MOSFET selection strategy.
I. Core Selection Principles and Scenario Adaptation Logic
(A) Core Selection Principles: Four-Dimensional Collaborative Adaptation
MOSFET selection requires coordinated adaptation across four dimensions—voltage, loss, package, and reliability—ensuring precise matching with harsh industrial operating conditions:
Sufficient Voltage Margin: For common DC bus voltages (e.g., 400V, 800V), reserve a rated voltage withstand margin of ≥50-100% to handle switching spikes and grid transients. Prioritize devices with appropriate voltage classes (e.g., 600V-900V for 400V bus).
Prioritize Ultra-Low Loss: Prioritize devices with low Rds(on) (minimizing conduction loss in high-current paths) and optimized switching characteristics (Qgd, Coss), adapting to continuous high-power cycling, maximizing energy throughput, and reducing cooling requirements.
Robust Package Matching: Choose packages like TO247, TO220, or TO3P with excellent thermal capability and mechanical robustness for main power stages. Select compact packages like SOT23 for low-power auxiliary circuits, balancing power handling and board space.
Industrial-Grade Reliability: Meet 24/7 durability in potentially harsh environments, focusing on high junction temperature capability (e.g., -55°C ~ 175°C), avalanche ruggedness, and long-term stability, ensuring system uptime.
(B) Scenario Adaptation Logic: Categorization by System Function
Divide the ESS into three core power conversion scenarios: First, the Main Bidirectional Inverter (system core), requiring high-voltage, high-efficiency switching. Second, Battery-Side DC-DC Converters (energy management), requiring very low conduction loss for high continuous currents. Third, Auxiliary & Control Power Supplies (system support), requiring low-power consumption and reliable isolation switching. This enables precise parameter-to-need matching.
II. Detailed MOSFET Selection Scheme by Scenario
(A) Scenario 1: Main Bidirectional Inverter (50-100kW) – High-Voltage Power Core
The grid-tied inverter handles high DC bus voltage (e.g., 400-800V) and requires efficient, rugged devices for high-frequency PWM.
Recommended Model: VBMB19R20S (Single-N, 900V, 20A, TO220F)
Parameter Advantages: Super-Junction (SJ_Multi-EPI) technology achieves an excellent balance of high voltage (900V) and relatively low Rds(on) (270mΩ @10V). The TO220F (full-pack) package offers superior isolation and thermal performance. High VGS(±30V) ensures noise immunity.
Adaptation Value: The 900V rating provides ample margin for 400V-650V DC buses, handling voltage spikes safely. Low switching loss of SJ technology increases inverter efficiency to >98%, crucial for energy savings. The rugged package suits industrial environments.
Selection Notes: Verify DC link voltage and max current per switch. Use with dedicated HV gate drivers (e.g., isolated drivers). Implement active clamping or snubbers for overvoltage protection. Ensure proper heatsinking.
(B) Scenario 2: Battery-Side DC-DC Converter (High Current Path) – Ultra-Low Loss Device
The battery interface converter manages high continuous charge/discharge currents (hundreds of Amps), where conduction loss is dominant.
Recommended Model: VBM1806 (Single-N, 80V, 120A, TO220)
Parameter Advantages: Exceptionally low Rds(on) of 6mΩ (at 10V) and very high continuous current (120A) using advanced Trench technology. The 80V rating is ideal for 48V battery banks with >50% margin. TO220 package allows for direct mounting on large heatsinks.
Adaptation Value: Drastically reduces conduction loss. For a 48V/5kW path (~104A), conduction loss per device is only ~0.065W, enabling converter efficiency >99%. High current capability supports parallel operation for higher power levels.
Selection Notes: Calculate max current per device with derating at high temperature. Use low-inductance busbar design for power loops. Pair with high-current gate drivers. Ensure symmetrical layout in parallel configurations.
(C) Scenario 3: Auxiliary Power & Control Switching – Compact & Efficient Device
Auxiliary circuits (sensors, controllers, fans, contactor drivers) require reliable low-side/high-side switching with minimal standby loss.
Recommended Model: VB1307N (Single-N, 30V, 5A, SOT23-3)
Parameter Advantages: Very low Vth (1.7V) enables direct drive from 3.3V/5V microcontrollers. Low Rds(on) (47mΩ @10V) minimizes voltage drop. The miniature SOT23-3 package saves critical board space in control sections.
Adaptation Value: Enables intelligent power management for non-critical loads, reducing system standby power. Can be used for MOSFET gate driving circuits or small relay control, offering high reliability in a tiny footprint.
Selection Notes: Keep load current well below 5A (e.g., <3A). Add a small gate resistor (10-47Ω) for ringing suppression. Provide adequate copper pour for heat dissipation even for this small package.
III. System-Level Design Implementation Points
(A) Drive Circuit Design: Matching Device Characteristics
VBMB19R20S: Must use isolated or high-side gate driver ICs with sufficient drive current (≥2A). Implement Miller clamp functionality to prevent shoot-through. Use negative turn-off voltage if possible for robust switching.
VBM1806: Requires a dedicated high-current gate driver (e.g., 4A peak) to achieve fast switching and minimize losses. Pay extreme attention to minimizing power loop inductance with paralleled ceramics and film capacitors.
VB1307N: Can be driven directly from MCU GPIO. For inductive loads (small relays, solenoids), include a flyback diode.
(B) Thermal Management Design: Tiered Heat Dissipation
VBMB19R20S & VBM1806: These are the primary heat generators. Mount on a common heatsink with appropriate thermal interface material. Use forced air cooling if power density is high. Monitor heatsink temperature.
VB1307N: Local copper pour (≥50mm²) is typically sufficient. Ensure overall board ventilation.
(C) EMC and Reliability Assurance
EMC Suppression:
VBMB19R20S: Use RC snubbers across drain-source or bus capacitors to damp high-frequency ringing. Implement proper filtering at the AC output.
VBM1806: Minimize loop area. Use a combination of low-ESR electrolytic and high-frequency ceramic capacitors on the DC bus.
Implement clear zoning between high-power, high-voltage, and low-power control sections on the PCB.
Reliability Protection:
Derating Design: Operate all devices at ≤70-80% of their rated voltage and current under worst-case temperature conditions.
Overcurrent Protection: Implement precise shunt-based or Hall-effect current sensing on all major power paths with fast-acting protection in the controller.
Surge/ESD Protection: Use TVS diodes at all external interfaces (communication, sensors). Consider varistors at the main AC input.
IV. Scheme Core Value and Optimization Suggestions
(A) Core Value
Maximized System Efficiency: The combination of SJ technology for high voltage and ultra-low Rds(on) Trench devices for high current pushes system round-trip efficiency above 96%, delivering significant operational cost savings.
Industrial Robustness and Density: Selected packages (TO220F, TO220) offer the ideal balance of thermal performance, mechanical strength, and ease of assembly for industrial equipment. The SOT23 device optimizes control board space.
Reliability-First Design: The chosen devices with high voltage margins, wide temperature ranges, and rugged technologies form the foundation for an ESS capable of 10+ years of reliable service in a paper mill environment.
(B) Optimization Suggestions
Power Scaling: For higher power inverters (>150kW), consider VBP165R22 (650V/22A, TO247) for its higher power package. For even higher battery currents, parallel more VBM1806 devices.
Technology Upgrade: For the highest efficiency in the inverter stage, evaluate Super-Junction MOSFETs like VBE17R15S (700V/15A) which may offer lower FOM (Figure of Merit).
Specialized Functions: For active battery balancing circuits, the low-Vth VBQA1407 (40V/70A, DFN8) could be an excellent choice for its low loss and compact size.
Protection Redundancy: For critical safety isolation points, consider using the VBM16I25 IGBT for its short-circuit withstand capability in series with a main contactor driver.
Conclusion
Power MOSFET selection is central to achieving high efficiency, power density, and unmatched reliability in paper mill energy storage systems. This scenario-based scheme provides comprehensive technical guidance for R&D through precise functional matching and robust system-level design. Future exploration can focus on wide-bandgap (SiC) devices for the highest efficiency inverter stages and intelligent power modules (IPMs), further advancing the performance and intelligence of industrial ESS solutions.

Detailed MOSFET Application Topology Diagrams