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Practical Design of the Power Chain for High-End Electric Racing Vehicles: The Triad of Peak Performance, Ultimate Efficiency, and Maximum Reliability
High-End Electric Racing Vehicle Power Chain System Topology Diagram

High-End Electric Racing Vehicle Power Chain Overall Topology Diagram

graph LR %% High-Voltage Power Core Section subgraph "High-Voltage Traction & Energy Storage System" HV_BATTERY["Racing Battery Pack
400-800VDC"] --> BATTERY_CONTACTOR["High-Current Contactor"] BATTERY_CONTACTOR --> DC_LINK["DC Link Busbar
with Film Capacitors"] DC_LINK --> MAIN_INVERTER_IN["Main Inverter Input"] subgraph "Main Traction Inverter (Parallel MOSFET Array)" MI_PHASE_A["Phase A: VBL11518
150V/75A x N"] MI_PHASE_B["Phase B: VBL11518
150V/75A x N"] MI_PHASE_C["Phase C: VBL11518
150V/75A x N"] end MAIN_INVERTER_IN --> MI_PHASE_A MAIN_INVERTER_IN --> MI_PHASE_B MAIN_INVERTER_IN --> MI_PHASE_C MI_PHASE_A --> MOTOR_A["Traction Motor Phase A"] MI_PHASE_B --> MOTOR_B["Traction Motor Phase B"] MI_PHASE_C --> MOTOR_C["Traction Motor Phase C"] SUPER_CAP["Supercapacitor Bank
for Peak Power"] --> BIDIRECTIONAL_DCDC["Bidirectional DC-DC Converter"] BIDIRECTIONAL_DCDC --> DC_LINK end %% Bidirectional DC-DC & Auxiliary Power Section subgraph "Bidirectional DC-DC & Auxiliary Power Management" subgraph "Bidirectional DC-DC Converter (Synchronous Buck/Boost)" BD_DCDC_HV["High-Voltage Side"] BD_DCDC_LV["Low-Voltage Side"] BD_MOSFETS["VBE5410 MOSFET Pair
±40V/70A & -60A"] end DC_LINK --> BD_DCDC_HV BD_DCDC_HV --> BD_MOSFETS BD_MOSFETS --> BD_DCDC_LV BD_DCDC_LV --> AUX_BUS["Auxiliary Power Bus
48V/12V"] AUX_BUS --> ACTUATOR_POWER["Actuator Power Distribution"] AUX_BUS --> CONTROL_POWER["Control Electronics Power"] AUX_BUS --> SENSOR_POWER["Sensor Network Power"] end %% Distributed Load & Actuator Control Section subgraph "Intelligent Load & Actuator Control Network" subgraph "Distributed Load Switch Modules" SW_DRS["VBGQA1152N
DRS Control"] SW_AERO["VBGQA1152N
Active Aero Control"] SW_BRAKE["VBGQA1152N
Brake-by-Wire Pump"] SW_COOLING["VBGQA1152N
Thermal Management Valve"] SW_DATA["VBGQA1152N
Data Acquisition"] end ACTUATOR_POWER --> SW_DRS ACTUATOR_POWER --> SW_AERO ACTUATOR_POWER --> SW_BRAKE ACTUATOR_POWER --> SW_COOLING ACTUATOR_POWER --> SW_DATA SW_DRS --> DRS_ACTUATOR["DRS Actuator"] SW_AERO --> AERO_ACTUATOR["Active Wing Actuator"] SW_BRAKE --> BRAKE_PUMP["Hydraulic Brake Pump"] SW_COOLING --> COOLING_VALVE["Coolant Flow Valve"] SW_DATA --> DATA_SYSTEM["Telemetry System"] end %% Control & Monitoring Section subgraph "Central Control & Health Monitoring" VCU["Vehicle Control Unit"] --> INVERTER_DRIVER["Inverter Gate Driver Array"] VCU --> DCDC_CONTROLLER["Bidirectional DC-DC Controller"] VCU --> LOAD_CONTROLLER["Distributed Load Controller"] INVERTER_DRIVER --> MI_PHASE_A INVERTER_DRIVER --> MI_PHASE_B INVERTER_DRIVER --> MI_PHASE_C DCDC_CONTROLLER --> BD_MOSFETS LOAD_CONTROLLER --> SW_DRS LOAD_CONTROLLER --> SW_AERO LOAD_CONTROLLER --> SW_BRAKE LOAD_CONTROLLER --> SW_COOLING LOAD_CONTROLLER --> SW_DATA subgraph "Real-Time Health Monitoring" TEMP_SENSORS["NTC Temperature Sensors"] CURRENT_SENSORS["High-Bandwidth Current Sensors"] VOLTAGE_SENSORS["Isolated Voltage Sensors"] VIBRATION_SENSORS["Accelerometers"] end TEMP_SENSORS --> BMS["Battery Management System"] CURRENT_SENSORS --> BMS VOLTAGE_SENSORS --> BMS VIBRATION_SENSORS --> VCU BMS --> VCU end %% Thermal Management System subgraph "Multi-Level Thermal Management Architecture" COOLING_LOOP["Main Cooling Loop"] --> INVERTER_COLD_PLATE["Inverter Cold Plate"] INVERTER_COLD_PLATE --> MI_PHASE_A INVERTER_COLD_PLATE --> MI_PHASE_B INVERTER_COLD_PLATE --> MI_PHASE_C COOLING_LOOP --> DCDC_HEATSINK["DC-DC Converter Heatsink"] DCDC_HEATSINK --> BD_MOSFETS subgraph "PCB-Level Thermal Management" PCB_THERMAL["Multi-Layer PCB with Thermal Vias"] PCB_THERMAL --> SW_DRS PCB_THERMAL --> SW_AERO PCB_THERMAL --> SW_BRAKE PCB_THERMAL --> SW_COOLING PCB_THERMAL --> SW_DATA end COOLING_PUMP["High-Flow Cooling Pump"] --> COOLING_LOOP COOLING_RADIATOR["Low-Temp Drop Radiator"] --> COOLING_LOOP VCU --> COOLING_PUMP VCU --> COOLING_RADIATOR_FAN["Radiator Fan"] end %% Protection & Communication subgraph "Protection & High-Speed Communication" subgraph "Transient Protection Network" ACTIVE_CLAMP["Active Clamp Circuit"] --> MI_PHASE_A RC_SNUBBER["RC Snubber Network"] --> BD_MOSFETS TVS_ARRAY["TVS Protection Array"] --> AUX_BUS end VCU --> CAN_FD["CAN FD Bus"] CAN_FD --> TELEMETRY["Live Telemetry System"] CAN_FD --> DIGITAL_TWIN["Cloud Digital Twin"] VCU --> ETHERNET["Ethernet for Data Logging"] ETHERNET --> DATA_STORAGE["High-Speed Data Storage"] end %% Style Definitions style MI_PHASE_A fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style BD_MOSFETS fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style SW_DRS fill:#fff3e0,stroke:#ff9800,stroke-width:2px style VCU fill:#fce4ec,stroke:#e91e63,stroke-width:2px

In the realm of high-end electric racing, where victory is measured in milliseconds, the power chain is the fundamental differentiator. It transcends mere energy conversion, becoming the core system dictating acceleration, top speed, strategic energy deployment, and finish-line reliability. A meticulously crafted power chain is the physical enabler for explosive torque delivery, ultra-efficient regenerative braking, and unwavering operation under the extreme thermal and vibrational stresses of the racetrack.
The challenge is multidimensional: How to maximize power density and switching speed without compromising robustness? How to ensure absolute reliability of every semiconductor under violent transients and thermal cycling? How to integrate ultra-fast control, advanced thermal management, and predictive health monitoring into a minimal mass and volume? The answers are embedded in the strategic selection and ruthless optimization of every component, from the main inverter to the smallest load switch.
I. Three Dimensions for Core Power Component Selection: The Philosophy of Minimal Loss, Maximum Speed, and Optimal Integration
1. Main Drive Inverter MOSFET: The Heart of Peak Power Output
For the critical main traction inverter, where power density and efficiency are paramount, the VBL11518 (150V/75A/TO-263, Single-N) is a compelling choice.
Voltage & Current Stress Analysis: Modern high-performance racing battery packs often operate in the 400-800V range, but the DC link for a single inverter module may be derived from a lower voltage or parallel configuration for optimal switching loss. A 150V-rated device is ideal for sub-systems or motors designed for lower voltage, high-current phases, ensuring a healthy derating margin. The TO-263 (D2PAK) package offers an excellent balance of low thermal resistance and compact footprint, crucial for a stacked, liquid-cooled inverter design.
Dynamic Performance & Loss Dominance: With an ultra-low RDS(on) of 18mΩ (at 10V VGS), conduction losses are minimized, which is critical during sustained high-current delivery in acceleration and climbing. The Trench technology ensures good switching characteristics. While not a SiC device, its performance offers a robust and potentially more cost-effective solution for specific racing classes or as part of a multi-phase, interleaved design to achieve extremely high total current capability.
Thermal Design Imperative: The package's exposed pad is designed for direct mounting to a liquid-cooled cold plate. The thermal path must be minimized: Tj = Tc + (I² RDS(on)) Rθjc. At 75A continuous, managing the conduction heat is key, requiring high-performance thermal interface materials and aggressive cooling.
2. High-Frequency Bidirectional DC-DC Converter MOSFET: The Engine of Strategic Energy Transfer
For advanced systems integrating high-voltage traction packs with low-voltage systems, supercapacitors, or secondary batteries, the VBE5410 (±40V/70A & -60A/TO-252-4L, Common Drain N+P) is uniquely suited.
Efficiency & Power Density for Dynamic Loads: Racing involves extreme transients. A bidirectional DC-DC converter, crucial for peak power shaving or feeding auxiliary systems, demands devices with minimal forward and reverse conduction loss. This dual N+P common-drain MOSFET pair, with a remarkably symmetric and low RDS(on) of 10mΩ (at 4.5V), is ideal for synchronous rectification in buck/boost topologies. The ultra-low loss directly translates to higher system efficiency and reduced cooling demand, saving critical weight.
Packaging for Performance & Reliability: The TO-252-4L (DPAK) package with a fourth lead (Kelvin source connection) is vital. It drastically reduces parasitic source inductance, enabling cleaner, faster switching essential for frequencies pushing 500kHz-1MHz in compact, lightweight magnetics. This directly improves transient response and power density.
Drive & Protection Criticality: A dedicated, high-speed gate driver with independent sourcing/sinking capability is mandatory. Careful layout to minimize loop inductance in the power stage and robust overcurrent protection (DESAT detection) are non-negotiable for reliability during aggressive energy recovery phases.
3. Distributed Load & Actuator Control MOSFET: The Nerve Endings for System Agility
For intelligent control of aerodynamic components (DRS, active wings), brake-by-wire pumps, and advanced thermal management valves, the VBGQA1152N (150V/50A/DFN8(5x6), Single-N) offers an unparalleled blend of performance and integration.
High-Side/Low-Side Switching Flexibility: With a 150V rating and 21mΩ RDS(on), this device can directly interface with intermediate voltage rails (e.g., 48V or 100V) used for high-power actuators in racing, avoiding the inefficiencies of further step-down conversion. Its high current capability in a tiny DFN package allows for direct, efficient PWM control of significant loads.
Ultimate Space and Weight Savings: The DFN8 (5x6) footprint is microscopic compared to traditional packages. This enables the placement of powerful, intelligent load switches directly on distributed control modules near the actuators, reducing harness weight, complexity, and voltage drop—a critical consideration in vehicle dynamics systems where response time is key.
Thermal Management via PCB: The exposed thermal pad must be soldered to a significant PCB copper area, acting as the primary heatsink. Multi-layer boards with internal ground planes and thermal vias connecting to an aluminum chassis are essential to dissipate heat from these high-density power nodes.
II. System Integration Engineering: The Race-Proven Implementation
1. Extreme Environment Thermal Management
Level 1: Direct-Flow Liquid Cooling: The VBL11518 (main inverter) and the heatsink for the VBE5410-based DC-DC converter are integrated into a single, high-flow, low-temperature-drop cooling loop, often using dielectric coolant for direct contact cooling in extreme applications.
Level 2: Targeted Forced Air & Conduction: High-frequency magnetic components in the DC-DC and sensitive control units use localized, speed-controlled fans. The VBGQA1152N and similar devices rely on advanced PCB thermal design—thick copper, insulated metal substrates (IMS), or direct bonding to structural cooling elements.
2. Electromagnetic Compatibility (EMC) and Signal Integrity
Ultra-Compact Power Loops: Use laminated busbars or multilayer PCB layers for all high di/dt paths (inverter phase legs, DC-DC switching nodes). Keep loop inductance in the single-digit nanohenry range.
Aggressive Shielding and Filtering: Motor cables are within braided shields, connected to the inverter chassis at both ends. All sensor and communication lines are differentially transmitted and shielded. Input filters are designed with low-ESR film capacitors and ferrite beads.
Isolation and Redundancy: Gate driver power supplies are isolated. Critical sensors (current, voltage) have redundant channels. System design follows ASIL D principles for functions like torque control and braking.
3. Reliability Under Extreme Transients
Active Clamping and Snubbers: Active clamp circuits are preferred over passive RCD snubbers for the main inverter to recycle energy and precisely control voltage spikes during turn-off. RC snubbers are used on auxiliary power switches.
Real-Time Health and Prognostics: The Battery Management System (BMS) and Motor Control Unit (MCU) monitor on-state resistance trends (via VDS sensing during known conditions) and junction temperature (via integrated sensors or thermal models) to predict performance degradation and flag potential issues before failure.
III. Performance Verification: Simulating the Race
1. Key Test Protocols
Dynamic Power Cycle Test: Replicates a full race distance with acceleration, top-speed sustain, braking, and pit-stop cycles on a dyno. Measures peak and sustained power output, efficiency map, and thermal stability.
Extended Thermal Shock Test: Rapid cycling between high-load heat saturation and cold soak to test solder joint and material integrity.
High-G Vibration and Shock Test: Exceeds standard automotive levels to simulate curb strikes, high-speed bumps, and severe track vibrations.
Transient Immunity and EMC Test: Injects severe load dumps and fast pulses to ensure no malfunction or performance drop.
2. Design Verification Benchmark
Target Metrics for a 300kW Peak Racing Inverter (using VBL11518 in parallel): Efficiency >99% at peak power point; power density >40kW/L.
Bidirectional DC-DC (based on VBE5410): Efficiency >97% at rated power in both directions; transient response time <50µs for full load steps.
System Latency: Total control loop latency from pedal input to torque response <1ms.
IV. Solution Scalability and Technology Roadmap
1. Adaptation Across Racing Classes
Formula E / Extreme E: Prioritizes the VBL11518 for its balance of performance and packaging. The VBE5410 is key for advanced energy recovery system (ERS) management.
Electric GT / Prototype Endurance: Can utilize multiple VBL11518 modules in parallel for multi-motor, high-torque applications. The VBGQA1152N is critical for complex aerodynamic and hydraulic control systems.
Electric Motorcycle Racing: The VBGQA1152N's size and performance make it ideal for compact, high-power controllers. Lower-voltage variants of the main drive topology may be employed.
2. Integration of Cutting-Edge Racing Technologies
Predictive Analytics & Digital Twin: Live telemetry of MOSFET junction temperatures, switching losses, and on-state resistance is fed into a cloud-based digital twin. AI models predict optimal energy deployment strategies for the remaining laps and flag component wear.
Silicon Carbide (SiC) Adoption Path: For the ultimate performance step:
Phase 1 (Current): High-performance Silicon MOSFETs (as selected) offer proven reliability.
Phase 2 (Immediate Development): Replace the main inverter switches with 650V/1200V SiC MOSFETs. This allows doubling of switching frequency, reducing inverter size and weight by ~30%, and gaining ~1-2% system efficiency.
Phase 3 (Future): Implement all-SiC power chain (Inverter, DC-DC, Charger), enabling extreme power densities, higher junction temperatures, and radically simplified cooling systems.
Integrated Vehicle Thermal Management: A unified control system dynamically allocates coolant flow between the powertrain, batteries, and aerodynamic cooling inlets based on real-time race strategy (attack vs. conserve), optimizing overall vehicle performance and energy usage.
Conclusion
The power chain for a championship-winning electric race vehicle is an exercise in focused extremism. It demands an obsessive balance between ultimate power density, nanosecond-speed control, resilience against brutal environmental forces, and strategic energy intelligence. The selected trio—the high-current VBL11518 for relentless propulsion, the ultra-efficient bidirectional VBE5410 for dynamic energy management, and the highly-integrated VBGQA1152N for agile system control—provides a foundational blueprint for peak performance.
As racing evolves towards greater connectivity and autonomy, the power management system will become the central nervous system of the vehicle. Engineers must adopt this framework of ruthless optimization, adhering to motorsport-grade validation while relentlessly pursuing the next technological edge, be it in wide-bandgap semiconductors or predictive AI. Ultimately, the perfect racing power chain is felt, not seen—a seamless surge of controlled power that translates engineering genius into pole position and podium finishes.

Detailed Topology Diagrams

Main Traction Inverter Topology Detail

graph LR subgraph "Three-Phase Inverter Bridge" DC_PLUS["DC+ Busbar"] --> PHASE_A_HIGH["Phase A High-Side"] DC_PLUS --> PHASE_B_HIGH["Phase B High-Side"] DC_PLUS --> PHASE_C_HIGH["Phase C High-Side"] subgraph "Parallel MOSFET Configuration" PAH_MOS1["VBL11518
150V/75A"] PAH_MOS2["VBL11518
150V/75A"] PAL_MOS1["VBL11518
150V/75A"] PAL_MOS2["VBL11518
150V/75A"] end PHASE_A_HIGH --> PAH_MOS1 PHASE_A_HIGH --> PAH_MOS2 PAH_MOS1 --> PHASE_A_OUT["Motor Phase A Output"] PAH_MOS2 --> PHASE_A_OUT PHASE_A_OUT --> PAL_MOS1 PHASE_A_OUT --> PAL_MOS2 PAL_MOS1 --> DC_MINUS["DC- Busbar"] PAL_MOS2 --> DC_MINUS DC_MINUS --> CURRENT_SHUNT["High-Precision Shunt"] CURRENT_SHUNT --> GND end subgraph "Gate Driver & Protection" GATE_DRIVER["Isolated Gate Driver"] --> GATE_RES["Gate Resistor Network"] GATE_RES --> PAH_MOS1 GATE_RES --> PAH_MOS2 GATE_RES --> PAL_MOS1 GATE_RES --> PAL_MOS2 subgraph "Active Clamp Circuit" CLAMP_CAP["Clamp Capacitor"] CLAMP_MOS["Clamp MOSFET"] CLAMP_DIODE["Fast Recovery Diode"] end PHASE_A_OUT --> CLAMP_DIODE CLAMP_DIODE --> CLAMP_CAP CLAMP_CAP --> CLAMP_MOS CLAMP_MOS --> DC_PLUS DESAT_CIRCUIT["DESAT Protection"] --> GATE_DRIVER TEMP_SENSOR["On-Board Temp Sensor"] --> MCU["Motor Control Unit"] end subgraph "Liquid Cooling Interface" COLD_PLATE["Liquid Cold Plate"] --> THERMAL_PAD["Thermal Interface Material"] THERMAL_PAD --> PAH_MOS1 THERMAL_PAD --> PAH_MOS2 THERMAL_PAD --> PAL_MOS1 THERMAL_PAD --> PAL_MOS2 COOLANT_IN["Coolant Inlet"] --> COLD_PLATE COLD_PLATE --> COOLANT_OUT["Coolant Outlet"] end style PAH_MOS1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style PAL_MOS1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

Bidirectional DC-DC Converter Topology Detail

graph LR subgraph "Synchronous Buck/Boost Power Stage" HV_IN["High-Voltage Input
from DC Link"] --> L1["Main Inductor"] L1 --> SW_NODE["Switching Node"] subgraph "Common-Drain MOSFET Pair" Q_HIGH["VBE5410 N-MOSFET
±40V/70A"] Q_LOW["VBE5410 P-MOSFET
-60A"] end SW_NODE --> Q_HIGH SW_NODE --> Q_LOW Q_HIGH --> HV_RETURN["High-Voltage Return"] Q_LOW --> LV_OUT["Low-Voltage Output"] LV_OUT --> C_OUT["Output Capacitor Bank"] C_OUT --> LV_RETURN["Low-Voltage Return"] KELVIN_SOURCE["Kelvin Source Connection"] --> Q_HIGH KELVIN_SOURCE --> Q_LOW end subgraph "Control & Driving Circuit" DCDC_CONTROLLER["Bidirectional Controller"] --> GATE_DRIVER["High-Speed Gate Driver"] GATE_DRIVER --> Q_HIGH GATE_DRIVER --> Q_LOW CURRENT_SENSE["Current Sense Amplifier"] --> SW_NODE CURRENT_SENSE --> DCDC_CONTROLLER VOLTAGE_SENSE_HV["HV Voltage Divider"] --> HV_IN VOLTAGE_SENSE_HV --> DCDC_CONTROLLER VOLTAGE_SENSE_LV["LV Voltage Sense"] --> LV_OUT VOLTAGE_SENSE_LV --> DCDC_CONTROLLER end subgraph "Protection & Snubber Networks" RC_SNUBBER["RC Snubber"] --> SW_NODE RC_SNUBBER --> HV_RETURN TVS_HV["TVS Array"] --> HV_IN TVS_HV --> HV_RETURN TVS_LV["TVS Array"] --> LV_OUT TVS_LV --> LV_RETURN OCP_CIRCUIT["Over-Current Protection"] --> CURRENT_SENSE OCP_CIRCUIT --> DCDC_CONTROLLER end subgraph "Thermal Management" HEATSINK["Aluminum Heatsink"] --> THERMAL_PAD["Thermal Interface"] THERMAL_PAD --> Q_HIGH THERMAL_PAD --> Q_LOW FAN["Cooling Fan"] --> HEATSINK TEMP_SENSOR["Temperature Sensor"] --> HEATSINK TEMP_SENSOR --> DCDC_CONTROLLER end style Q_HIGH fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_LOW fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Distributed Load Switch Topology Detail

graph LR subgraph "Intelligent Load Switch Module" POWER_IN["48V Auxiliary Power"] --> INPUT_CAP["Input Capacitor"] INPUT_CAP --> LOAD_SWITCH_IN["Switch Input"] subgraph "VBGQA1152N Power Switch" Q1["VBGQA1152N
150V/50A"] BODY_DIODE["Body Diode"] end LOAD_SWITCH_IN --> Q1 Q1 --> LOAD_OUTPUT["Load Output"] LOAD_OUTPUT --> LOAD_CONNECTOR["Actuator Connector"] GATE_CONTROL["Gate Control Pin"] --> GATE_RES["Gate Resistor"] GATE_RES --> Q1 SOURCE_PIN["Source Pin"] --> CURRENT_SENSE["Current Sense Resistor"] CURRENT_SENSE --> GND end subgraph "Control & Interface Circuit" MCU_GPIO["MCU GPIO Pin"] --> LEVEL_SHIFTER["Level Shifter"] LEVEL_SHIFTER --> GATE_CONTROL subgraph "Current Monitoring" SENSE_AMP["Current Sense Amplifier"] SENSE_AMP --> CURRENT_SENSE SENSE_AMP --> ADC["MCU ADC Input"] end subgraph "Fault Detection" DESAT_DETECT["DESAT Detection Circuit"] TEMP_SENSE["On-Die Temperature Sense"] OV_PROTECT["Over-Voltage Protection"] end DESAT_DETECT --> Q1 TEMP_SENSE --> Q1 OV_PROTECT --> LOAD_OUTPUT DESAT_DETECT --> FAULT_PIN["Fault Output"] TEMP_SENSE --> FAULT_PIN OV_PROTECT --> FAULT_PIN FAULT_PIN --> MCU_GPIO end subgraph "PCB Thermal Management" THERMAL_PAD["Exposed Thermal Pad"] --> PCB_COPPER["PCB Copper Pour"] PCB_COPPER --> THERMAL_VIAS["Thermal Via Array"] THERMAL_VIAS --> GROUND_PLANE["Inner Ground Plane"] GROUND_PLANE --> CHASSIS_CONN["Chassis Connection"] Q1 --> THERMAL_PAD end subgraph "Load Protection" TVS_LOAD["TVS Diode"] --> LOAD_OUTPUT TVS_LOAD --> GND FREE_WHEEL["Free-Wheel Diode"] --> LOAD_OUTPUT FREE_WHEEL --> POWER_IN FUSE["Polyfuse"] --> LOAD_OUTPUT FUSE --> LOAD_CONNECTOR end style Q1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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