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Preface: Building the "Power Core" for Metro Fare Gate Systems – Discussing the Systems Thinking Behind Power Device Selection
Metro Fare Gate Power System Topology Diagram

Metro Fare Gate Power System Overall Topology Diagram

graph LR %% Input Power Stage subgraph "Input Power Conditioning Stage" AC_IN["Metro Power Input
110VAC/220VAC or 400VDC"] --> EMI_FILTER["EMI/RFI Input Filter"] EMI_FILTER --> RECTIFIER["Bridge Rectifier
& DC Bus Filter"] RECTIFIER --> HV_BUS["High-Voltage DC Bus"] HV_BUS --> FLYBACK_SW["Flyback/Buck Switching Node"] FLYBACK_SW --> Q_INPUT["VBL16R41SFD
600V/41A N-MOSFET"] Q_INPUT --> GND_INPUT[Primary Ground] FLYBACK_TRANS["Flyback Transformer"] --> FLYBACK_SW subgraph "Primary Side Control" PWM_CONTROLLER["PWM Controller"] --> GATE_DRIVER["Isolated Gate Driver"] GATE_DRIVER --> Q_INPUT end end %% Motor Drive Stage subgraph "Gate Motor Drive Stage (H-Bridge)" POWER_RAIL_24V["24V Power Rail"] --> H_BRIDGE["H-Bridge Motor Driver"] subgraph "Motor Power Switches" Q_MOTOR_H1["VBQA1301
30V/128A N-MOSFET"] Q_MOTOR_H2["VBQA1301
30V/128A N-MOSFET"] Q_MOTOR_L1["VBQA1301
30V/128A N-MOSFET"] Q_MOTOR_L2["VBQA1301
30V/128A N-MOSFET"] end H_BRIDGE --> Q_MOTOR_H1 H_BRIDGE --> Q_MOTOR_H2 H_BRIDGE --> Q_MOTOR_L1 H_BRIDGE --> Q_MOTOR_L2 Q_MOTOR_H1 --> MOTOR_OUT1["Motor Phase A"] Q_MOTOR_H2 --> MOTOR_OUT2["Motor Phase B"] Q_MOTOR_L1 --> MOTOR_GND[Motor Ground] Q_MOTOR_L2 --> MOTOR_GND MOTOR_OUT1 --> GATE_MOTOR["Fare Gate Motor
(Servo/DC Motor)"] MOTOR_OUT2 --> GATE_MOTOR subgraph "Motor Control System" MCU["Main Control MCU"] --> MOTOR_DRIVER_IC["Motor Driver IC"] MOTOR_DRIVER_IC --> H_BRIDGE POSITION_SENSOR["Position Sensor"] --> MCU SPEED_SENSOR["Speed Sensor"] --> MCU end end %% Auxiliary Control Stage subgraph "Auxiliary Load Management Stage" AUX_POWER["Auxiliary Power
12V/5V Rails"] --> MCU subgraph "Intelligent Load Switches" SW_SOLENOID["VBQF1310
30V/30A N-MOSFET
Solenoid Lock"] SW_INDICATOR["VBQF1310
30V/30A N-MOSFET
Status Indicator"] SW_ALARM["VBQF1310
30V/30A N-MOSFET
Audible Alarm"] SW_SENSOR["VBQF1310
30V/30A N-MOSFET
Sensor Array"] end MCU --> SW_SOLENOID MCU --> SW_INDICATOR MCU --> SW_ALARM MCU --> SW_SENSOR SW_SOLENOID --> SOLENOID_LOAD["Locking Solenoid"] SW_INDICATOR --> LED_LOAD["Status LEDs"] SW_ALARM --> BUZZER_LOAD["Audible Buzzer"] SW_SENSOR --> SENSOR_LOAD["Sensor Network"] end %% Protection & Thermal Management subgraph "Protection & Thermal Management" subgraph "Electrical Protection" SNUBBER["RCD Snubber Circuit"] --> Q_INPUT FREE_WHEEL_DIODE["Freewheeling Diodes"] --> GATE_MOTOR TVS_GATE["TVS Array"] --> GATE_DRIVER CURRENT_SHUNT["Current Sense Shunt"] --> MCU end subgraph "Three-Level Thermal Management" COOLING_MOTOR["Level 1: Chassis Mount
Motor MOSFETs"] --> Q_MOTOR_H1 COOLING_INPUT["Level 2: PCB Heatsink
Input MOSFET"] --> Q_INPUT COOLING_AUX["Level 3: Natural Cooling
Auxiliary MOSFETs"] --> SW_SOLENOID end TEMP_SENSOR["NTC Temperature Sensors"] --> MCU end %% Communication Interfaces subgraph "System Communication" MCU --> CAN_BUS["CAN Bus Interface"] MCU --> ETHERNET["Ethernet Interface"] MCU --> RS485["RS-485 Interface"] CAN_BUS --> STATION_CONTROL["Station Control System"] ETHERNET --> MAINTENANCE_PORT["Maintenance Port"] RS485 --> PERIPHERAL_DEVICES["Peripheral Devices"] end %% Style Definitions style Q_INPUT fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_MOTOR_H1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style SW_SOLENOID fill:#fff3e0,stroke:#ff9800,stroke-width:2px style MCU fill:#fce4ec,stroke:#e91e63,stroke-width:2px

In the era of intelligent urban rail transit, a high-performance metro fare gate system is not just a mechanical assembly of barriers and sensors; it is a precise, efficient, and reliable electromechanical "control node." Its core performance metrics—fast and smooth gate movement, high reliability under continuous operation, and efficient management of auxiliary functions—are deeply rooted in a fundamental module: the power conversion and motor drive system. This article employs a systematic design mindset to analyze the core challenges within the power path of metro fare gate systems: how, under constraints of high reliability, compact size, harsh environmental adaptability (like dust and vibration), and strict cost control, can we select the optimal combination of power MOSFETs for the three key nodes: high-voltage input power conditioning, main gate motor drive, and auxiliary control circuit switching?
Within the design of a metro fare gate, the power chain determines system responsiveness, energy efficiency, longevity, and form factor. Based on comprehensive considerations of input surge protection, high-current pulsed output for motor starts/stops, and compact control logic, this article selects three key devices from the component library to construct a hierarchical, robust power solution.
I. In-Depth Analysis of the Selected Device Combination and Application Roles
1. The Guardian of the Power Entry: VBL16R41SFD (600V N-MOSFET, 41A, TO-263) – Input AC/DC or DC/DC Primary Side Switch/Surge Protector
Core Positioning & Topology Deep Dive: Positioned at the system's front-end, it handles the rectified/filtered high-voltage DC bus (typically derived from 110VAC/220VAC lines or a 400VDC rail). Its 600V drain-source voltage rating provides robust margin against line surges and transients common in metro electrical environments. The Super Junction Multi-EPI technology offers an excellent balance of low on-resistance (62mΩ @10V) and switching performance.
Key Technical Parameter Analysis:
Voltage Ruggedness: The 600V rating ensures reliable operation in off-line flyback or buck converter topologies for generating lower voltage rails (e.g., 24V, 12V) for internal electronics.
Current Handling for Auxiliary Power: With a continuous current rating of 41A, it comfortably supports the total power needs of the gate's control boards, sensors, and communication modules.
Selection Trade-off: Compared to traditional Planar MOSFETs (e.g., VBP165R04 with much higher RDS(on)), this SJ MOSFET significantly reduces conduction loss, improving efficiency and reducing thermal stress in the enclosed fare gate cabinet.
2. The Muscle for Gate Movement: VBQA1301 (30V N-MOSFET, 128A, DFN8(5x6)) – Main Gate Drive Motor H-Bridge Switch
Core Positioning & System Benefit: As the core switch in the H-bridge or three-phase inverter driving the gate's servo/DC motor, its extremely low RDS(on) of 1.2mΩ @10V is critical. During frequent gate open/close cycles involving high starting torque and regenerative braking, lower conduction loss translates to:
Higher System Efficiency & Reduced Heating: Minimizes energy waste, allowing for smaller power supplies and heatsinks.
Superior Peak Performance: The ultra-low RDS(on) and 128A current rating enable handling of high pulsed currents during motor stall or rapid reversal, ensuring reliable operation under high passenger flow.
Compact Drive Unit Design: The DFN8(5x6) package offers an outstanding current density, allowing for a very compact motor driver PCB placed near the motor.
Drive Design Key Points: The low gate threshold voltage (Vth=1.7V) enables easy drive by standard logic-level controllers, but its high current capability necessitates a gate driver with sufficient peak current to charge/discharge the gate capacitance quickly for clean switching and minimized losses under PWM control.
3. The Nimble Control Interface: VBQF1310 (30V N-MOSFET, 30A, DFN8(3x3)) – Auxiliary Solenoid, Lamp, and Sensor Power Switch
Core Positioning & System Integration Advantage: This small-form-factor MOSFET is ideal for point-of-load switching of various auxiliary components within the fare gate, such as indicator LEDs, audible alarms, locking solenoids, or sensor arrays. Its 30A rating provides ample headroom for these typically lower-current loads.
Application Example: Used as a low-side switch controlled directly by the microcontroller to energize a 24V solenoid for a mechanical lock or to pulse a high-current LED for status indication.
PCB Design Value: The tiny DFN8(3x3) footprint is crucial for dense control boards, allowing placement very close to the load or MCU, reducing trace inductance and improving noise immunity.
Balance of Performance and Size: With an RDS(on) of 13mΩ @10V, it offers low enough conduction loss to avoid significant heating while maintaining a minimal PCB footprint—a perfect balance for distributed intelligent power distribution.
II. System Integration Design and Expanded Key Considerations
1. Topology, Drive, and Control Loop
Input Power Stage & Isolation: The VBL16R41SFD in a flyback/buck topology requires proper isolated gate driving and feedback loop design to generate stable low-voltage rails. Its switching must be synchronized with the controller to manage inrush currents.
Precision Motor Control: The VBQA1301, as the final power stage for motor control, requires matched high-current gate drivers (possibly integrated in a motor driver IC) to ensure precise PWM application for smooth speed and torque control, minimizing gate vibration and noise.
Digital Load Management: The VBQF1310 gates are driven directly by GPIOs or via small signal buffers from the main MCU, enabling software-controlled sequencing, diagnostic current sensing via a shunt resistor, and fast shutdown in fault conditions.
2. Hierarchical Thermal Management Strategy
Primary Heat Source (Conduction to Chassis): The VBQA1301 in the motor driver will generate the most heat during peak loads. Its DFN package requires a carefully designed PCB thermal pad with multiple vias to transfer heat to an internal metal chassis or heatsink.
Secondary Heat Source (PCB Spreader): The VBL16R41SFD in the input power stage should be mounted on a PCB area with a large copper pour, possibly coupled to the enclosure via thermal interface material, as its losses are moderate but continuous.
Tertiary Heat Source (Natural Convection): The VBQF1310 and other control MOSFETs typically dissipate minimal power and rely on natural convection and PCB trace cooling.
3. Engineering Details for Reliability Reinforcement
Electrical Stress Protection:
VBL16R41SFD: Requires an snubber network across the transformer primary or drain node to clamp voltage spikes caused by leakage inductance.
Inductive Load Handling: Freewheeling diodes must be placed across solenoids or motor coils switched by VBQA1301 and VBQF1310 to suppress turn-off voltage spikes.
Enhanced Gate Protection: All gate drives should include series resistors and low-ESR bypass capacitors. For VBQA1301, attention to gate loop inductance is critical to prevent oscillations. TVS diodes on gate pins may be used for extra robustness in noisy environments.
Derating Practice:
Voltage Derating: Ensure VDS stress on VBL16R41SFD remains below 480V (80% of 600V) under worst-case input surge. For VBQA1301 and VBQF1310, ensure VDS margin above the 24V/12V bus with transients.
Current & Thermal Derating: Base continuous current ratings on actual operating junction temperature within the fare gate enclosure (may reach 60-70°C ambient). Use transient thermal impedance data to ensure safe operation during motor start-up pulses or solenoid activation.
III. Quantifiable Perspective on Scheme Advantages and Competitor Comparison
Quantifiable Efficiency Improvement: Using VBQA1301 (RDS(on)=1.2mΩ) for a gate motor drive versus a typical 30V MOSFET with 5mΩ can reduce conduction losses by over 50% during high-torque periods, directly lowering internal temperature and improving component lifespan.
Quantifiable Space Saving & Reliability: Using VBQF1310 in DFN8(3x3) for multiple load switches saves over 70% board area per channel compared to SOT-223 or TO-252 devices, enabling more compact control boards and reducing the number of interconnects, thereby improving overall system MTBF.
Lifecycle Cost Optimization: The robust selection of VBL16R41SFD for input protection reduces the risk of field failures due to power line disturbances, minimizing maintenance downtime and repair costs in high-availability metro environments.
IV. Summary and Forward Look
This scheme provides a complete, optimized power chain for metro fare gate systems, spanning from ruggedized input power handling to high-force motor drive and intelligent auxiliary control. Its essence lies in "right-sizing for the application":
Input Power Level – Focus on "Ruggedness & Efficiency": Select a high-voltage SJ MOSFET that combines surge immunity with good switching performance for efficient power conversion.
Motor Drive Level – Focus on "Ultimate Power Density & Performance": Utilize an ultra-low RDS(on) device in a compact package to deliver high pulsed current in minimal space, enabling faster and more reliable gate operation.
Auxiliary Control Level – Focus on "Miniaturization & Integration": Employ tiny, cost-effective MOSFETs to achieve distributed smart switching, simplifying control logic and saving valuable real estate.
Future Evolution Directions:
Integrated Motor Driver Modules: For further simplification, consider smart power modules that integrate the gate drivers, protection, and VBQA1301-like MOSFETs into a single package.
Enhanced Diagnostic Features: Future designs could incorporate e-fuse or IntelliFET type devices with built-in current sensing and fault reporting for predictive maintenance of solenoids and motors.
Wider Bandgap Adoption: For the highest efficiency in the input power stage, consideration could be given to GaN HEMTs for even higher frequency operation and reduced size of magnetic components.
Engineers can refine this framework based on specific fare gate parameters such as motor type (stepper vs. servo), operating voltage rails, peak stall currents, and environmental sealing requirements to design highly responsive, durable, and maintenance-friendly metro fare gate systems.

Detailed Topology Diagrams

Input Power Conditioning Stage Detail

graph LR subgraph "High-Voltage Input Processing" AC_IN["AC Input 110/220V"] --> FUSE["Input Fuse"] FUSE --> SURGE_SUPPRESSOR["Surge Suppressor"] SURGE_SUPPRESSOR --> EMI_FILTER["EMI Filter"] EMI_FILTER --> BRIDGE_RECT["Bridge Rectifier"] BRIDGE_RECT --> BULK_CAP["Bulk Capacitor"] BULK_CAP --> HV_BUS["HV DC Bus (300-400VDC)"] end subgraph "Flyback/Buck Converter Topology" HV_BUS --> TRANSFORMER_PRI["Transformer Primary"] TRANSFORMER_PRI --> DRAIN_NODE["Drain Switching Node"] DRAIN_NODE --> MOSFET_Q["VBL16R41SFD
600V/41A"] MOSFET_Q --> SOURCE_NODE["Source (GND)"] CONTROLLER["PWM Controller"] --> DRIVER["Gate Driver"] DRIVER --> MOSFET_Q TRANSFORMER_SEC["Transformer Secondary"] --> RECT_OUT["Output Rectifier"] RECT_OUT --> OUTPUT_FILTER["LC Filter"] OUTPUT_FILTER --> LOW_VOLT_RAIL["24V/12V/5V Rails"] end subgraph "Protection Circuits" subgraph "Primary Side Protection" RC_SNUBBER["RC Snubber"] --> DRAIN_NODE RCD_CLAMP["RCD Clamp"] --> TRANSFORMER_PRI OVP_CIRCUIT["Over-Voltage Protection"] --> CONTROLLER OCP_CIRCUIT["Over-Current Protection"] --> CONTROLLER end end style MOSFET_Q fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

Motor Drive H-Bridge Topology Detail

graph LR subgraph "H-Bridge Motor Driver Configuration" POWER_SUPPLY["24V Power Supply"] --> BUS_CAP["Bus Capacitors"] BUS_CAP --> HIGH_SIDE_SUPPLY["High-Side Supply"] HIGH_SIDE_SUPPLY --> Q_H1["VBQA1301
High-Side 1"] HIGH_SIDE_SUPPLY --> Q_H2["VBQA1301
High-Side 2"] Q_H1 --> MOTOR_TERMINAL_A["Motor Terminal A"] Q_H2 --> MOTOR_TERMINAL_B["Motor Terminal B"] MOTOR_TERMINAL_A --> Q_L1["VBQA1301
Low-Side 1"] MOTOR_TERMINAL_B --> Q_L2["VBQA1301
Low-Side 2"] Q_L1 --> MOTOR_GND["Motor Ground"] Q_L2 --> MOTOR_GND end subgraph "Gate Drive & Control" MCU["Motor Control MCU"] --> GATE_DRIVER_IC["Gate Driver IC"] subgraph "High-Side Drive" BOOTSTRAP_CIRCUIT["Bootstrap Circuit"] --> HIGH_SIDE_DRIVER["High-Side Driver"] HIGH_SIDE_DRIVER --> Q_H1 HIGH_SIDE_DRIVER --> Q_H2 end subgraph "Low-Side Drive" LOW_SIDE_DRIVER["Low-Side Driver"] --> Q_L1 LOW_SIDE_DRIVER --> Q_L2 end end subgraph "Motor & Protection" MOTOR_TERMINAL_A --> GATE_MOTOR["Gate Motor"] MOTOR_TERMINAL_B --> GATE_MOTOR subgraph "Protection Components" FREE_WHEEL_D1["Freewheel Diode"] -->|Across| Q_H1 FREE_WHEEL_D2["Freewheel Diode"] -->|Across| Q_H2 SHUNT_RESISTOR["Current Sense Shunt"] --> MOTOR_GND OVERCURRENT_DETECT["Over-Current Detect"] --> GATE_DRIVER_IC end end style Q_H1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_L1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Auxiliary Load Management Topology Detail

graph LR subgraph "Microcontroller Interface" MCU_GPIO["MCU GPIO Pin"] --> LEVEL_SHIFTER["Level Shifter/Buffer"] LEVEL_SHIFTER --> GATE_SIGNAL["Gate Control Signal"] end subgraph "Intelligent Load Switch Channels" subgraph "Channel 1: Solenoid Control" GATE_SIGNAL --> SW1["VBQF1310
30V/30A"] VCC_24V["24V Supply"] --> SOLENOID_COIL["Solenoid Coil"] SOLENOID_COIL --> SW1 SW1 --> GND_SW1[Ground] DIODE_SW1["Flyback Diode"] -->|Across| SOLENOID_COIL end subgraph "Channel 2: Indicator Control" GATE_SIGNAL --> SW2["VBQF1310
30V/30A"] VCC_12V["12V Supply"] --> LED_ARRAY["LED Array"] LED_ARRAY --> CURRENT_LIMIT["Current Limiter"] CURRENT_LIMIT --> SW2 SW2 --> GND_SW2[Ground] end subgraph "Channel 3: Alarm Control" GATE_SIGNAL --> SW3["VBQF1310
30V/30A"] VCC_5V["5V Supply"] --> BUZZER["Audible Buzzer"] BUZZER --> SW3 SW3 --> GND_SW3[Ground] end subgraph "Channel 4: Sensor Power" GATE_SIGNAL --> SW4["VBQF1310
30V/30A"] VCC_SENSOR["Sensor 5V"] --> SENSOR_NETWORK["Sensor Network"] SENSOR_NETWORK --> SW4 SW4 --> GND_SW4[Ground] FILTER_CAP["Filter Capacitor"] -->|Parallel| SENSOR_NETWORK end end subgraph "Diagnostic Features" SHUNT_RESISTORS["Current Sense Resistors"] -->|Each Channel| MCU_ADC["MCU ADC"] OVERTEMP_SENSOR["Overtemperature Sensor"] --> MCU_GPIO end style SW1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style SW2 fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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