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Preface: Architecting the "Energy Nexus" for AI-Enabled Hybrid Road-Air Mobility – A Systems Approach to Power Device Selection
AI Hybrid Road-Air Vehicle Power System Topology

AI Hybrid Road-Air Vehicle Power System Overall Topology

graph LR %% Main Power Distribution subgraph "High-Voltage Power Distribution & Propulsion" HV_BATTERY["High-Voltage Battery Pack
600-800VDC"] --> HV_DC_BUS["High-Voltage DC Bus"] HV_DC_BUS --> MAIN_INVERTER["Main Propulsion Inverter"] subgraph "Main Inverter MOSFET Array" Q_HS1["VBL18R10S
800V/10A (High-Side)"] Q_LS1["VBL18R10S
800V/10A (Low-Side)"] Q_HS2["VBL18R10S
800V/10A (High-Side)"] Q_LS2["VBL18R10S
800V/10A (Low-Side)"] end MAIN_INVERTER --> Q_HS1 MAIN_INVERTER --> Q_LS1 MAIN_INVERTER --> Q_HS2 MAIN_INVERTER --> Q_LS2 Q_HS1 --> PHASE_U["Phase U Output"] Q_LS1 --> HV_GND["High-Voltage Ground"] Q_HS2 --> PHASE_V["Phase V Output"] Q_LS2 --> HV_GND PHASE_U --> LIFT_MOTOR["Lift/Cruise Motor
(3-Phase AC)"] PHASE_V --> LIFT_MOTOR end %% High-Current Power Conversion subgraph "High-Current DC-DC Conversion & Auxiliary Drives" HV_DC_BUS --> DC_DC_CONVERTER["Non-Isolated DC-DC Converter"] subgraph "DC-DC Converter MOSFET Array" Q_MAIN["VBGL1806
80V/95A (Main Switch)"] Q_SYNC["VBGL1806
80V/95A (Synchronous)"] end DC_DC_CONVERTER --> Q_MAIN DC_DC_CONVERTER --> Q_SYNC Q_MAIN --> LV_BUS["Low-Voltage Bus
48V/12V"] Q_SYNC --> LV_GND["Low-Voltage Ground"] LV_BUS --> AUX_INVERTER["Auxiliary Drive Inverter"] AUX_INVERTER --> Q_AUX1["VBGL1806
80V/95A"] AUX_INVERTER --> Q_AUX2["VBGL1806
80V/95A"] Q_AUX1 --> WHEEL_MOTOR["Wheel/Aux Motor"] Q_AUX2 --> LV_GND end %% Intelligent Energy Management subgraph "Intelligent Bidirectional Energy Gateway" MAIN_BATTERY["Main Li-Ion Battery"] --> BIDIR_SWITCH["Bidirectional Switch"] SUPERCAP_BANK["Supercapacitor Bank"] --> BIDIR_SWITCH subgraph "Bidirectional Switch Array" SW_BIDIR1["VBE5415
Common Drain N+P"] SW_BIDIR2["VBE5415
Common Drain N+P"] end BIDIR_SWITCH --> SW_BIDIR1 BIDIR_SWITCH --> SW_BIDIR2 SW_BIDIR1 --> ENERGY_BUS["Common Energy Bus"] SW_BIDIR2 --> ENERGY_BUS ENERGY_BUS --> REDUNDANT_BUS1["Redundant Bus A"] ENERGY_BUS --> REDUNDANT_BUS2["Redundant Bus B"] end %% Control & Management System subgraph "AI Control & Vehicle Management" VMC["Vehicle Management Computer
(AI Algorithms)"] --> GATE_DRIVER_HV["Isolated Gate Driver
(High-Voltage)"] VMC --> GATE_DRIVER_LV["Gate Driver
(Low-Voltage)"] VMC --> BIDIR_CONTROLLER["Bidirectional Switch Controller"] GATE_DRIVER_HV --> Q_HS1 GATE_DRIVER_HV --> Q_LS1 GATE_DRIVER_LV --> Q_MAIN GATE_DRIVER_LV --> Q_AUX1 BIDIR_CONTROLLER --> SW_BIDIR1 subgraph "Sensor Network" CURRENT_SENSE["High-Precision Current Sensors"] VOLTAGE_SENSE["Voltage Monitoring"] TEMP_SENSORS["Temperature Sensors"] end CURRENT_SENSE --> VMC VOLTAGE_SENSE --> VMC TEMP_SENSORS --> VMC end %% Thermal Management System subgraph "Three-Level Thermal Management Architecture" COOLING_LEVEL1["Level 1: Liquid Cooling Plate"] --> Q_HS1 COOLING_LEVEL1 --> Q_LS1 COOLING_LEVEL2["Level 2: Forced Air Cooling"] --> Q_MAIN COOLING_LEVEL2 --> Q_AUX1 COOLING_LEVEL3["Level 3: Conductive Cooling"] --> SW_BIDIR1 COOLING_LEVEL3 --> VMC TEMP_SENSORS --> THERMAL_CONTROLLER["Thermal Management Controller"] THERMAL_CONTROLLER --> PUMP_CONTROL["Liquid Pump Control"] THERMAL_CONTROLLER --> FAN_CONTROL["Fan Speed Control"] end %% Protection Systems subgraph "Aerospace-Grade Protection" subgraph "Electrical Protection" SNUBBER_NETWORK["RCD Snubber Network"] TVS_ARRAY["TVS Diode Array"] GATE_CLAMP["Gate Clamp Circuits"] end SNUBBER_NETWORK --> Q_HS1 TVS_ARRAY --> GATE_DRIVER_HV GATE_CLAMP --> Q_HS1 subgraph "Fault Detection" OVERCURRENT["Overcurrent Detection"] OVERVOLTAGE["Overvoltage Detection"] OVERTEMP["Overtemperature Detection"] end OVERCURRENT --> FAULT_LATCH["Fault Latch Circuit"] OVERVOLTAGE --> FAULT_LATCH OVERTEMP --> FAULT_LATCH FAULT_LATCH --> SAFETY_SHUTDOWN["Safety Shutdown"] end %% Communication Network VMC --> AVIONICS_BUS["Avionics CAN Bus"] VMC --> CLOUD_CONNECT["Cloud Connectivity"] VMC --> DIAGNOSTICS["Predictive Health Management"] %% Style Definitions style Q_HS1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_MAIN fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style SW_BIDIR1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style VMC fill:#fce4ec,stroke:#e91e63,stroke-width:2px

In the emerging era of AI-driven hybrid road-air vehicles, the power system transcends the role of a mere energy supplier. It becomes the intelligent, resilient, and high-density "energy nexus" that must seamlessly support multi-modal propulsion, sophisticated avionics, and autonomous systems. The core challenge lies in achieving unparalleled power density, extreme reliability under dynamic stresses, and intelligent energy flow management—all within severe weight and thermal constraints. This demands a meticulous, system-level selection of power semiconductor devices across the entire energy chain.
This analysis adopts a holistic, performance-driven mindset to address the critical nodes in a hybrid eVTOL (Electric Vertical Take-Off and Landing) or flying car power train. We focus on selecting an optimal MOSFET combination for three pivotal functions: the high-voltage propulsion inverter, the high-current DC link / motor drive stage, and the intelligent, bidirectional auxiliary power gateway. From the provided portfolio, we identify three key devices to construct a layered, synergistic power solution.
I. In-Depth Analysis of the Selected Device Combination and Application Roles
1. The High-Voltage Propulsion Cornerstone: VBL18R10S (800V, 10A, Rds(on)=480mΩ @10V, TO-263) – Main Traction Inverter High-Side/Low-Side Switch
Core Positioning & Topology Rationale: Designed for the high-voltage DC bus (typically 600-800V) feeding the primary lift and cruise motor inverters. Its 800V VDS rating provides robust margin for overvoltage transients inherent in aerospace-grade systems and regenerative braking. The Super Junction Multi-EPI technology offers an excellent balance between high breakdown voltage and relatively low specific on-resistance.
Key Technical Parameter Analysis:
Voltage Ruggedness vs. Conduction Loss: The 480mΩ Rds(on) at 10V VGS is commendable for an 800V device, directly impacting inverter efficiency at partial loads. Its high Vth (3.5V) enhances noise immunity in high dv/dt environments.
Package & Thermal Performance: The TO-263 (D²PAK) package offers a superior power-to-footprint ratio and is ideally suited for direct mounting onto a liquid-cooled cold plate, which is mandatory for the high-heat-flux main inverter.
Selection Trade-off: Compared to lower-voltage devices requiring complex series connections or much costlier SiC alternatives at this voltage, the VBL18R10S presents a robust, cost-effective silicon-based solution for core propulsion reliability.
2. The High-Current Drive Muscle: VBGL1806 (80V, 95A, Rds(on)=5.2mΩ @10V, TO-263) – Low-Voltage High-Current Inverter / DC-DC Converter Switch
Core Positioning & System Benefit: This device is engineered for the high-current paths, such as the low-voltage/high-current motor drives for auxiliary thrusters or wheels, or as the primary switch in a high-power non-isolated DC-DC converter linking different voltage domains (e.g., 48V to 12V). Its ultra-low Rds(on) of 5.2mΩ is critical.
Maximizing Efficiency & Power Density: Minimizes conduction loss, which dominates at high continuous currents, directly extending range and reducing thermal management burden.
Enabling Peak Power Pulses: The SGT (Shielded Gate Trench) technology and high current rating (95A) support the short-duration, high-torque demands during transition phases (e.g., road-to-air).
Drive Considerations: Its high current capability necessitates a low-inductance gate drive loop and a driver capable of sourcing/sinking high peak currents to manage the significant Qg for fast switching, minimizing losses in high-frequency PWM applications.
3. The Intelligent Bidirectional Power Gateway: VBE5415 (Common Drain N+P, ±40V, ±50A, Rds(on)~14mΩ @4.5V, TO-252-4L) – Battery/Supercapacitor Bi-directional Interface & Load Switch
Core Positioning & System Integration Advantage: This unique common-drain, back-to-back N+P channel pair in a single package is a breakthrough for compact, efficient bidirectional switching. It is perfectly suited for:
Advanced Energy Storage Interfacing: Seamlessly managing bidirectional energy flow between a main lithium battery and a high-power supercapacitor bank for peak shaving during takeoff and regenerative energy capture.
Redundant Bus Tie: Acting as an intelligent, low-loss switch between redundant power buses, ensuring system safety and availability.
Simplified Circuitry: The integrated structure eliminates the need for discrete series diodes or complex back-to-back MOSFET configurations, saving significant PCB area and reducing parasitic inductance—a critical factor for high-efficiency, fast-switching power paths.
II. System Integration Design and Expanded Key Considerations
1. Topology, Drive, and AI-Enhanced Control Loop
Propulsion Inverter Synergy: The VBL18R10S and VBGL1806 must be driven by high-performance, isolated gate drivers with precise dead-time control. Their switching behavior is integral to the AI-based motor control algorithms (FOC/MTPA) optimizing efficiency across flight regimes.
Intelligent Energy Routing: The VBE5415 gates are controlled by the central Vehicle/Power Management Computer (VMC/PMC). AI algorithms can dynamically control its state based on flight mode, energy state, and fault conditions, enabling predictive energy dispatch between storage elements.
2. Hierarchical Thermal Management Strategy for Airworthiness
Primary Heat Source (Liquid Cooling Plate): The main inverter module housing multiple VBL18R10S and VBGL1806 devices requires direct integration into the vehicle's liquid cooling loop, with careful attention to thermal interface materials and baseplate flatness.
Secondary Heat Source (Forced Air/Conduction): Modules containing VBE5415 for high-current bidirectional transfer may require dedicated heatsinks coupled to air ducts or conduction paths to the primary cold plate, depending on the duty cycle.
Tertiary Heat Source (PCB & Enclosure Conduction): Lower-power management circuits rely on thermal vias, thick copper planes, and chassis mounting to dissipate heat, adhering to aerospace-grade PCB design standards.
3. Engineering Details for Aerospace-Grade Reliability
Electrical Stress Protection:
High-Voltage Ringing: Snubber networks are essential across VBL18R10S to clamp voltage spikes from motor winding leakage inductance.
Inductive Load Management: Loads switched by VBGL1806 or VBE5415 require appropriate freewheeling paths or TVS diodes.
Enhanced Gate Protection: All gate drives must feature low-inductance layout, optimized series gate resistors, and clamp Zeners (e.g., ±15V/±20V) to protect against transients. Redundant pull-down/pull-up paths ensure fail-off/fail-on states as required by safety analyses.
Stringent Derating Practice:
Voltage Derating: Operate VBL18R10S at ≤ 80% of 800V (640V) under worst-case transients. For VBGL1806 and VBE5415, ensure VDS stress remains below 60-70% of rated voltage.
Current & Thermal Derating: Use transient thermal impedance (ZthJA) curves to derate current ratings based on the actual mission profile pulse lengths. Design for a maximum junction temperature (Tjmax) of ≤ 110°C to 125°C, factoring in the high-reliability requirements of aviation.
III. Quantifiable Perspective on Scheme Advantages
Efficiency Gains: Employing VBGL1806 in a 50kW auxiliary drive inverter can reduce conduction losses by over 40% compared to standard 80V MOSFETs, directly contributing to extended mission endurance.
Integration & Weight Savings: Using a single VBE5415 to replace a discrete 4-MOSFET bidirectional switch reduces component count by 75%, saving >60% PCB area and critical weight—a paramount metric in aerospace.
System Intelligence & Robustness: The integrated bidirectional capability of VBE5415, managed by AI, enables real-time energy optimization and graceful degradation, significantly improving system-level MTBF and functional safety.
IV. Summary and Forward Look
This selection provides a robust, efficient, and intelligent power device foundation for AI hybrid road-air vehicles, addressing high-voltage propulsion, high-current distribution, and intelligent energy routing.
Propulsion Level – Focus on "High-Voltage Assurance": Prioritize voltage ruggedness and proven reliability in the core flight-critical inverter path.
Power Distribution Level – Focus on "Ultra-Low Loss": Leverage advanced SGT technology to minimize conduction loss in high-energy transfer paths, maximizing overall powertrain efficiency.
Energy Management Level – Focus on "Bidirectional Integration": Utilize innovative packaging to create compact, low-loss, and intelligent switches for dynamic energy storage management.
Future Evolution Directions:
Adoption of Wide Bandgap (SiC/GaN): For next-generation ultra-high efficiency and frequency demands, the main inverter (VBL18R10S role) will transition to SiC MOSFETs, while GaN HEMTs could augment the VBGL1806 role in ultra-high-frequency auxiliary converters.
Fully Integrated Smart Power Nodes: Evolution towards Intelligent Power Stages (IPS) or modules integrating the MOSFETs (like VBE5415), gate driver, protection, and diagnostics will further simplify design, enhance monitoring, and support predictive health management (PHM) for autonomous systems.
This framework serves as a starting point. Engineers must refine the selection based on specific vehicle parameters: bus voltages (e.g., 800V vs. 400V), peak/continuous power profiles, detailed mission load cycles, and the rigorous requirements of applicable aviation certification standards.

Detailed Topology Diagrams

High-Voltage Propulsion Inverter Topology Detail

graph LR subgraph "Three-Phase Inverter Bridge" HV_BUS["High-Voltage DC Bus
600-800V"] --> PHASE_U_LEG["Phase U Leg"] HV_BUS --> PHASE_V_LEG["Phase V Leg"] HV_BUS --> PHASE_W_LEG["Phase W Leg"] subgraph "Phase U Switching Pair" Q_UH["VBL18R10S
High-Side Switch"] Q_UL["VBL18R10S
Low-Side Switch"] end subgraph "Phase V Switching Pair" Q_VH["VBL18R10S
High-Side Switch"] Q_VL["VBL18R10S
Low-Side Switch"] end PHASE_U_LEG --> Q_UH Q_UH --> U_OUT["U Phase Output"] Q_UL --> U_OUT U_OUT --> HV_GND2["High-Voltage Ground"] PHASE_V_LEG --> Q_VH Q_VH --> V_OUT["V Phase Output"] Q_VL --> V_OUT V_OUT --> HV_GND2 end subgraph "Gate Drive & Protection" GATE_DRIVER["Isolated Gate Driver IC"] --> DEADTIME_CONTROL["Dead-Time Control"] DEADTIME_CONTROL --> Q_UH_GATE["Q_UH Gate"] DEADTIME_CONTROL --> Q_UL_GATE["Q_UL Gate"] subgraph "Gate Protection" GATE_RESISTOR["Series Gate Resistor"] CLAMP_ZENER["Zener Clamp (±15V)"] PULL_DOWN["Redundant Pull-Down"] end GATE_RESISTOR --> Q_UH_GATE CLAMP_ZENER --> Q_UH_GATE PULL_DOWN --> Q_UH_GATE end subgraph "Motor & Control Interface" U_OUT --> MOTOR_WINDING["Motor Phase Winding"] V_OUT --> MOTOR_WINDING subgraph "AI Motor Control" FOC_ALGORITHM["Field-Oriented Control"] MTPA_OPTIMIZER["MTPA Optimization"] CURRENT_REG["Current Regulator"] end FOC_ALGORITHM --> PWM_GENERATOR["PWM Generator"] PWM_GENERATOR --> GATE_DRIVER CURRENT_SENSOR["Phase Current Sensor"] --> CURRENT_REG CURRENT_REG --> FOC_ALGORITHM end subgraph "Snubber & Protection" SNUBBER_CIRCUIT["RCD Snubber Network"] --> Q_UH SNUBBER_CIRCUIT --> Q_UL OVERVOLTAGE_CLAMP["Overvoltage Clamp"] --> HV_BUS OVERCURRENT_DETECT["Overcurrent Detection"] --> SAFETY_SHUTDOWN2["Safety Shutdown"] end style Q_UH fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_VH fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

High-Current DC-DC Converter Topology Detail

graph LR subgraph "Buck Converter Topology" HV_INPUT["High-Voltage Input
48-72V"] --> INPUT_CAP["Input Capacitor Bank"] INPUT_CAP --> INDUCTOR["Power Inductor"] INDUCTOR --> SWITCH_NODE["Switch Node"] subgraph "Main Switch & Synchronous Rectifier" Q_MAIN2["VBGL1806
Main Switch"] Q_SYNC2["VBGL1806
Synchronous Rectifier"] end SWITCH_NODE --> Q_MAIN2 SWITCH_NODE --> Q_SYNC2 Q_MAIN2 --> HV_GND3["Input Ground"] Q_SYNC2 --> OUTPUT_CAP["Output Capacitor Bank"] OUTPUT_CAP --> LV_OUTPUT["Low-Voltage Output
12V"] LV_OUTPUT --> LV_GND2["Output Ground"] end subgraph "Gate Drive Circuit" DRIVER_IC["High-Current Gate Driver"] --> GATE_RES_MAIN["Gate Resistor"] DRIVER_IC --> GATE_RES_SYNC["Gate Resistor"] GATE_RES_MAIN --> Q_MAIN2_GATE["Q_MAIN Gate"] GATE_RES_SYNC --> Q_SYNC2_GATE["Q_SYNC Gate"] subgraph "Drive Power" BOOTSTRAP["Bootstrap Circuit"] CHARGE_PUMP["Charge Pump"] end BOOTSTRAP --> DRIVER_IC CHARGE_PUMP --> DRIVER_IC end subgraph "Control & Regulation" CONTROLLER_IC["DC-DC Controller"] --> PWM_SIGNAL["PWM Signal"] PWM_SIGNAL --> DRIVER_IC VOLTAGE_FEEDBACK["Output Voltage Feedback"] --> ERROR_AMP["Error Amplifier"] ERROR_AMP --> COMPENSATOR["Compensation Network"] COMPENSATOR --> CONTROLLER_IC CURRENT_LIMIT["Current Limit Setting"] --> CONTROLLER_IC end subgraph "Thermal Management" HEATSINK["Forced Air Heatsink"] --> Q_MAIN2 HEATSINK --> Q_SYNC2 THERMAL_PAD["Thermal Interface Material"] --> Q_MAIN2 TEMP_MONITOR["Temperature Monitor"] --> CONTROLLER_IC end subgraph "Protection Features" OVERCURRENT_PROT["Cycle-by-Cycle Current Limit"] SHORT_CIRCUIT["Short-Circuit Protection"] OVERTEMP_SHUTDOWN["Overtemperature Shutdown"] end OVERCURRENT_PROT --> CONTROLLER_IC SHORT_CIRCUIT --> CONTROLLER_IC OVERTEMP_SHUTDOWN --> CONTROLLER_IC style Q_MAIN2 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_SYNC2 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Intelligent Bidirectional Switch Topology Detail

graph LR subgraph "Common-Drain N+P Configuration" subgraph "VBE5415 Internal Structure" DRAIN_COMMON["Common Drain Terminal"] N_CHANNEL["N-Channel MOSFET"] P_CHANNEL["P-Channel MOSFET"] end SOURCE_N["N-Channel Source"] --> N_CHANNEL SOURCE_P["P-Channel Source"] --> P_CHANNEL N_CHANNEL --> DRAIN_COMMON P_CHANNEL --> DRAIN_COMMON end subgraph "Bidirectional Switching Application" BATTERY_TERMINAL["Battery Terminal"] --> SOURCE_N SUPERCAP_TERMINAL["Supercapacitor Terminal"] --> SOURCE_P DRAIN_COMMON --> COMMON_BUS["Common Energy Bus"] subgraph "Control Interface" GATE_DRIVER_N["N-Channel Gate Driver"] GATE_DRIVER_P["P-Channel Gate Driver"] LEVEL_SHIFTER["Level Shifter"] end CONTROL_SIGNAL["Control Signal from VMC"] --> LEVEL_SHIFTER LEVEL_SHIFTER --> GATE_DRIVER_N LEVEL_SHIFTER --> GATE_DRIVER_P GATE_DRIVER_N --> GATE_N["N-Channel Gate"] GATE_DRIVER_P --> GATE_P["P-Channel Gate"] end subgraph "Current Flow Management" subgraph "Forward Direction (Battery to Bus)" CURRENT_FWD["Forward Current"] --> BATTERY_TERMINAL N_CHANNEL -->|"Conduction Path"| CURRENT_FWD end subgraph "Reverse Direction (Bus to Battery)" CURRENT_REV["Reverse Current"] --> COMMON_BUS N_CHANNEL -->|"Body Diode or Channel"| CURRENT_REV end CURRENT_SENSOR2["Bidirectional Current Sensor"] --> BATTERY_TERMINAL CURRENT_SENSOR2 --> VMC2["Vehicle Management Computer"] end subgraph "Parallel Operation for High Current" subgraph "Multiple Device Parallel" SWITCH1["VBE5415 #1"] SWITCH2["VBE5415 #2"] SWITCH3["VBE5415 #3"] end BATTERY_TERMINAL --> SWITCH1 BATTERY_TERMINAL --> SWITCH2 BATTERY_TERMINAL --> SWITCH3 SWITCH1 --> COMMON_BUS SWITCH2 --> COMMON_BUS SWITCH3 --> COMMON_BUS BALANCE_RESISTORS["Current Balancing Resistors"] --> SWITCH1 BALANCE_RESISTORS --> SWITCH2 end subgraph "Protection & Monitoring" TVS_PROTECTION["TVS for Voltage Spikes"] --> BATTERY_TERMINAL TVS_PROTECTION --> SUPERCAP_TERMINAL GATE_PROTECTION["Gate-Source Protection"] --> GATE_N GATE_PROTECTION --> GATE_P TEMPERATURE_MONITOR["Temperature Monitor"] --> VMC2 end style N_CHANNEL fill:#fff3e0,stroke:#ff9800,stroke-width:2px style P_CHANNEL fill:#fff3e0,stroke:#ff9800,stroke-width:2px style SWITCH1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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