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Smart Industrial UPS Power MOSFET Selection Solution: High-Reliability and High-Efficiency Power Conversion System Adaptation Guide
Industrial UPS Power MOSFET System Topology Diagram

Industrial UPS Power Conversion System Overall Topology Diagram

graph LR %% Main Power Input Section subgraph "Three-Phase Input & Rectification" AC_IN["Three-Phase 380VAC/400VAC Input"] --> EMI_FILTER["Industrial-Grade EMI Filter"] EMI_FILTER --> RECTIFIER_BRIDGE["Three-Phase Rectifier Bridge"] RECTIFIER_BRIDGE --> DC_BUS_CAP["DC Bus Capacitor
800VDC"] end %% PFC/Inverter Bridge Section subgraph "High-Voltage PFC/Inverter Bridge (20kW+)" DC_BUS_CAP --> PFC_INV_BRIDGE["High-Voltage Bridge Node"] subgraph "IGBT Power Core Array" Q_IGBT1["VBP112MI50
1200V/50A IGBT with FRD"] Q_IGBT2["VBP112MI50
1200V/50A IGBT with FRD"] Q_IGBT3["VBP112MI50
1200V/50A IGBT with FRD"] Q_IGBT4["VBP112MI50
1200V/50A IGBT with FRD"] end PFC_INV_BRIDGE --> Q_IGBT1 PFC_INV_BRIDGE --> Q_IGBT2 PFC_INV_BRIDGE --> Q_IGBT3 PFC_INV_BRIDGE --> Q_IGBT4 Q_IGBT1 --> PFC_INDUCTOR["PFC Boost Inductor"] Q_IGBT2 --> PFC_INDUCTOR Q_IGBT3 --> PFC_INDUCTOR Q_IGBT4 --> PFC_INDUCTOR PFC_INDUCTOR --> HIGH_VOLTAGE_BUS["High-Voltage DC Bus
700-800VDC"] end %% DC-AC Inverter Output Section subgraph "DC-AC Inverter Output Stage" HIGH_VOLTAGE_BUS --> INV_BRIDGE["Inverter Bridge Node"] subgraph "Efficiency Critical MOSFET Array" Q_INV1["VBP165R34SFD
650V/34A N-MOSFET"] Q_INV2["VBP165R34SFD
650V/34A N-MOSFET"] Q_INV3["VBP165R34SFD
650V/34A N-MOSFET"] Q_INV4["VBP165R34SFD
650V/34A N-MOSFET"] end INV_BRIDGE --> Q_INV1 INV_BRIDGE --> Q_INV2 INV_BRIDGE --> Q_INV3 INV_BRIDGE --> Q_INV4 Q_INV1 --> OUTPUT_FILTER["Output LC Filter"] Q_INV2 --> OUTPUT_FILTER Q_INV3 --> OUTPUT_FILTER Q_INV4 --> OUTPUT_FILTER OUTPUT_FILTER --> AC_OUT["AC Output
220V/380V"] AC_OUT --> CRITICAL_LOAD["Critical Industrial Load"] end %% Auxiliary Power Management subgraph "Auxiliary & Control Power Management" AUX_POWER["Auxiliary Power Supply
12V/5V"] --> MCU["Main Control MCU/DSP"] subgraph "System Support Power Switches" SW_AUX1["VBA3102N
Dual N-MOSFET"] SW_AUX2["VBA3102N
Dual N-MOSFET"] SW_FAN["VBA3102N
Dual N-MOSFET"] SW_COMM["VBA3102N
Dual N-MOSFET"] end MCU --> SW_AUX1 MCU --> SW_AUX2 MCU --> SW_FAN MCU --> SW_COMM SW_AUX1 --> AUX_RAILS["Multiple Auxiliary Rails"] SW_AUX2 --> CONTROL_CIRCUITS["Control Circuits"] SW_FAN --> FAN_ARRAY["Cooling Fan Array"] SW_COMM --> COMM_MODULES["Communication Modules"] end %% Driving & Protection Section subgraph "High-Reliability Driving & Protection" IGBT_DRIVER["IGBT Gate Driver
with Negative Turn-off"] --> Q_IGBT1 IGBT_DRIVER --> Q_IGBT2 IGBT_DRIVER --> Q_IGBT3 IGBT_DRIVER --> Q_IGBT4 MOSFET_DRIVER["High-Performance MOSFET Driver"] --> Q_INV1 MOSFET_DRIVER --> Q_INV2 MOSFET_DRIVER --> Q_INV3 MOSFET_DRIVER --> Q_INV4 subgraph "Industrial Protection Circuits" DESAT_DETECTION["Desaturation Detection"] RCD_SNUBBER["RCD Snubber Circuits"] RC_SNUBBER["RC Absorption Networks"] TVS_ARRAY["TVS Protection Array"] CURRENT_SENSE["High-Precision Sensing"] THERMAL_SENSORS["Multiple NTC Sensors"] end DESAT_DETECTION --> IGBT_DRIVER RCD_SNUBBER --> Q_IGBT1 RC_SNUBBER --> Q_INV1 TVS_ARRAY --> MOSFET_DRIVER CURRENT_SENSE --> MCU THERMAL_SENSORS --> MCU end %% Thermal Management System subgraph "Hierarchical Thermal Management" LEVEL1_COOLING["Level 1: Forced Air Cooling
IGBT Heat Sinks"] --> Q_IGBT1 LEVEL1_COOLING --> Q_IGBT2 LEVEL2_COOLING["Level 2: Forced Air Cooling
MOSFET Heat Sinks"] --> Q_INV1 LEVEL2_COOLING --> Q_INV2 LEVEL3_COOLING["Level 3: Natural Convection
Control Components"] --> VBA3102N LEVEL3_COOLING --> MCU MCU --> FAN_CONTROL["Fan PWM Control"] MCU --> TEMP_MONITOR["Temperature Monitoring"] end %% System Communication MCU --> CAN_TRANS["CAN Transceiver"] CAN_TRANS --> INDUSTRIAL_BUS["Industrial CAN Bus"] MCU --> MODBUS["MODBUS RTU Interface"] MCU --> ETHERNET["Industrial Ethernet"] %% Style Definitions style Q_IGBT1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_INV1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style SW_AUX1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style MCU fill:#fce4ec,stroke:#e91e63,stroke-width:2px

With the increasing demand for power supply continuity and quality in critical industrial infrastructure, high-end industrial Uninterruptible Power Supplies (UPS) have become the cornerstone for ensuring operational stability. Their power conversion system, serving as the "core muscle," needs to provide efficient, robust, and precisely controlled power conversion for critical stages such as power factor correction (PFC), DC-AC inversion, and static bypass switching. The selection of power semiconductor devices directly determines the system's conversion efficiency, power density, overload capability, and mean time between failures (MTBF). Addressing the stringent requirements of industrial UPS for reliability, efficiency, thermal management, and ruggedness, this article centers on scenario-based adaptation to reconstruct the power device selection logic, providing an optimized solution ready for direct implementation.
I. Core Selection Principles and Scenario Adaptation Logic
Core Selection Principles
High Voltage & Current Ruggedness: For three-phase input/output systems (380VAC/400VAC), DC bus voltages typically reach 700-800VDC. Devices must have sufficient voltage margin (e.g., 1200V for IGBTs, 650V for MOSFETs) and current rating to handle surges, overloads, and hard switching conditions.
Ultra-Low Loss Priority: Prioritize devices with minimal conduction losses (low VCEsat for IGBTs, low Rds(on) for MOSFETs) and favorable switching characteristics (low Eon/Eoff) to maximize efficiency, especially at high power levels (tens to hundreds of kVA).
Package & Thermal Suitability: Select high-thermal-performance packages like TO-247, TO-264 for main power paths to ensure effective heat dissipation under continuous high-load operation. Use compact packages for auxiliary circuits to save space.
Maximum Reliability & Durability: Designed for 24/7 operation in harsh environments. Devices must exhibit excellent thermal stability, high short-circuit withstand capability, and robust gate oxide integrity.
Scenario Adaptation Logic
Based on the core power stages within a high-end industrial UPS, device applications are divided into three main scenarios: High-Voltage PFC/Inverter Bridge (Power Core), DC-AC Inverter Output Stage (Efficiency Critical), and Auxiliary & Control Power Management (System Support). Device parameters and technologies are matched accordingly.
II. MOSFET/IGBT Selection Solutions by Scenario
Scenario 1: High-Voltage PFC / Inverter Bridge (20kW+) – Power Core Device
Recommended Model: VBP112MI50 (IGBT with FRD, 1200V, 50A, TO-247)
Key Parameter Advantages: Utilizes Field Stop (FS) technology, offering a low VCEsat of 1.55V (typical) at 50A, balancing conduction and switching loss. The 1200V rating provides ample margin for 800VDC bus applications.
Scenario Adaptation Value: The integrated Fast Recovery Diode (FRD) simplifies inverter and PFC bridge design, enhances reliability, and reduces layout complexity. The TO-247 package facilitates excellent thermal coupling to heatsinks, crucial for managing losses in high-power stages. Its rugged construction ensures stable operation under industrial grid disturbances.
Applicable Scenarios: Three-phase boost PFC stages, high-voltage DC-AC inverter bridges in double-conversion online UPS.
Scenario 2: DC-AC Inverter Output Stage / High-Current Switching – Efficiency Critical Device
Recommended Model: VBP165R34SFD (N-MOSFET, 650V, 34A, TO-247)
Key Parameter Advantages: Features Super Junction Multi-EPI technology, achieving an ultra-low Rds(on) of 80mΩ at 10V Vgs. The 650V rating is ideal for inverter output stages connected to the DC bus.
Scenario Adaptation Value: Ultra-low conduction loss minimizes heat generation in the output stage, allowing for higher switching frequencies to improve output waveform quality (lower THD) and reduce filter size. Its high current capability supports parallel operation for higher power modules, enhancing design scalability.
Applicable Scenarios: Inverter output switching stage, high-current DC-DC converters within the UPS, static switch (STS) driving circuits.
Scenario 3: Auxiliary & Control Power Management – System Support Device
Recommended Model: VBA3102N (Dual N-MOSFET, 100V, 12A per Ch, SOP8)
Key Parameter Advantages: Integrated dual N-channel MOSFETs with high parameter consistency. Low Rds(on) of 12mΩ (10V) and low gate threshold voltage (1.8V) enable efficient switching and easy drive by controller ICs.
Scenario Adaptation Value: The compact SOP8 package saves significant PCB space in control boards. Enables precise and efficient power management for auxiliary power supplies (e.g., flyback converter primaries/secondaries), fan drives, and communication module power routing. Dual independent channels support redundant or multi-rail designs.
Applicable Scenarios: Synchronous rectification in auxiliary SMPS, low-side switching for fan arrays, load point power distribution.
III. System-Level Design Implementation Points
Drive Circuit Design
VBP112MI50 (IGBT): Requires a dedicated high-current gate driver IC with negative turn-off voltage capability for robust switching and short-circuit protection. Careful attention to gate resistor selection to optimize switching speed and minimize EMI.
VBP165R34SFD: Pair with a high-performance gate driver. Minimize power loop and gate loop inductance in the PCB layout. Use Kelvin source connection if possible for stable driving.
VBA3102N: Can be driven directly by PWM controller outputs. Include local decoupling capacitors. Small gate resistors are recommended to prevent oscillation.
Thermal Management Design
Hierarchical Heat Sinking: VBP112MI50 and VBP165R34SFD must be mounted on large, forced-air-cooled heatsinks. Use thermal interface materials with low thermal resistance. Perform detailed thermal simulation to ensure junction temperatures remain within safe limits at maximum ambient temperature (often 55°C or higher in industrial settings).
Derating Philosophy: Apply conservative derating: operate IGBTs and high-voltage MOSFETs at ≤ 70% of their rated voltage and current under worst-case conditions. Ensure a junction temperature margin of ≥ 15°C below the maximum rated Tj.
EMC and Reliability Assurance
snubber Circuits: Implement RC snubbers or RCD clamps across the VBP112MI50 and VBP165R34SFD to dampen voltage overshoot during switching.
Protection Networks: Incorporate desaturation detection for the IGBT. Use gate clamping TVS diodes on all high-power devices. Implement comprehensive overcurrent, overtemperature, and bus overvoltage protection in the control firmware.
Filtering: Use input and output EMI filters compliant with industrial standards. Ensure proper grounding and shielding to mitigate conducted and radiated emissions.
IV. Core Value of the Solution and Optimization Suggestions
The power device selection solution for high-end industrial UPS proposed in this article, based on scenario adaptation logic, achieves optimal device matching from the high-voltage input stage to the high-current output stage and auxiliary management. Its core value is mainly reflected in the following three aspects:
Maximized System Efficiency and Power Density: The combination of a low-VCEsat 1200V IGBT for the high-voltage bridge and an ultra-low Rds(on) 650V Super Junction MOSFET for the output stage minimizes losses in the two most loss-critical areas. This enables higher system efficiency (targeting >96% in online mode), reduces cooling requirements, and allows for increased power density in cabinet designs.
Uncompromising Industrial-Grade Reliability: The selected devices, particularly the rugged FS IGBT and the high-voltage SJ MOSFET, are designed for demanding applications. Combined with robust gate driving, conservative thermal design, and comprehensive protection schemes, this solution ensures exceptional MTBF and the ability to withstand industrial power line transients and overloads, meeting the expectations for mission-critical backup power.
Scalable and Serviceable Architecture: The use of standard, high-performance packages (TO-247, SOP8) simplifies the mechanical and thermal design. The clear functional separation between devices (IGBT for very high voltage/power, MOSFET for optimized efficiency, integrated dual MOSFET for control) creates a modular and scalable architecture. This aids in design reuse across different power ratings and simplifies field diagnostics and component replacement.
In the design of power conversion systems for high-end industrial UPS, the selection of power devices is a decisive factor in achieving efficiency, reliability, and power density. The scenario-based selection solution proposed in this article, by accurately matching the technical demands of different power stages and combining it with robust system-level drive, thermal, and protection design, provides a comprehensive, actionable technical reference for UPS developers. As industrial UPS evolves towards higher efficiency (e.g., ECO mode performance), modularity, and predictive maintenance capabilities, the selection of power devices will place greater emphasis on loss profiling across load ranges and health monitoring integration. Future exploration could focus on the application of advanced wide-bandgap devices (SiC MOSFETs) in PFC and inverter stages and the development of intelligent power modules (IPMs) with integrated sensing, paving the way for the next generation of ultra-efficient, ultra-compact, and smart industrial UPS systems. In an era of increasing digitalization, a reliable power foundation is the essential safeguard for uninterrupted industrial operations.

Detailed Topology Diagrams

High-Voltage PFC/Inverter Bridge Topology Detail

graph LR subgraph "Three-Phase Boost PFC Stage" A[Three-Phase AC Input] --> B[EMI Filter] B --> C[Three-Phase Rectifier] C --> D[DC Bus Capacitors] D --> E[PFC Bridge Node] E --> F["VBP112MI50
1200V/50A IGBT"] F --> G[PFC Inductor] G --> H[High-Voltage DC Bus] I[PFC Controller] --> J[Gate Driver] J --> F H -->|Voltage Feedback| I end subgraph "High-Voltage Inverter Bridge" H --> K[Inverter Bridge Node] K --> L["VBP112MI50
1200V/50A IGBT"] L --> M[Output Node] K --> N["VBP112MI50
1200V/50A IGBT"] N --> O[DC Bus Negative] P[Inverter Controller] --> Q[Gate Driver with Isolation] Q --> L Q --> N M -->|Current Feedback| P end style F fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style L fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

DC-AC Inverter Output Stage Topology Detail

graph LR subgraph "Full-Bridge Inverter Output" A[High-Voltage DC Bus] --> B[Inverter Bridge Input] B --> C["VBP165R34SFD
650V/34A MOSFET"] C --> D[Bridge Leg Node] B --> E["VBP165R34SFD
650V/34A MOSFET"] E --> F[DC Bus Return] D --> G["VBP165R34SFD
650V/34A MOSFET"] G --> H[Output Filter] D --> I["VBP165R34SFD
650V/34A MOSFET"] I --> F J[PWM Controller] --> K[High-Speed Gate Driver] K --> C K --> E K --> G K --> I H --> L[Output Transformer] L --> M[AC Output] end subgraph "Parallel Operation for High Power" N["VBP165R34SFD MOSFET"] --> O[Current Sharing Bus] P["VBP165R34SFD MOSFET"] --> O Q["VBP165R34SFD MOSFET"] --> O R["VBP165R34SFD MOSFET"] --> O O --> S[Output Node] end style C fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style N fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Auxiliary Power Management Topology Detail

graph LR subgraph "Dual MOSFET Load Switching" A[MCU GPIO] --> B[Level Shifter] B --> C["VBA3102N Dual MOSFET"] subgraph C ["VBA3102N Internal Structure"] direction LR GATE1[Gate 1] GATE2[Gate 2] SOURCE1[Source 1] SOURCE2[Source 2] DRAIN1[Drain 1] DRAIN2[Drain 2] end VCC_12V[12V Auxiliary] --> DRAIN1 VCC_12V --> DRAIN2 SOURCE1 --> D[Load 1: Communication Module] SOURCE2 --> E[Load 2: Cooling Fan] D --> F[Ground] E --> F end subgraph "Synchronous Rectification in Auxiliary SMPS" G[Auxiliary Transformer] --> H[Rectification Node] H --> I["VBA3102N MOSFET Channel 1"] I --> J[Output Capacitor] J --> K[5V Output] H --> L["VBA3102N MOSFET Channel 2"] L --> M[Ground] N[PWM Controller] --> O[Driver] O --> I O --> L end subgraph "Redundant Power Distribution" P[Primary 12V Rail] --> Q["VBA3102N MOSFET"] R[Backup 12V Rail] --> S["VBA3102N MOSFET"] Q --> T[Critical Control Circuit] S --> T U[MCU Control] --> Q U --> S end style C fill:#fff3e0,stroke:#ff9800,stroke-width:2px style I fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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