With the rapid advancement of distributed photovoltaic systems and the increasing demand for system-level efficiency, high-end photovoltaic combiner boxes have evolved into intelligent nodes for energy management and protection. The power switching and protection circuits, serving as the "heart and nervous system" of the unit, provide critical functions for main current confluence, string-level bypass, and auxiliary power management. The selection of power MOSFETs directly determines the system's conduction loss, power density, protection speed, and long-term reliability in harsh outdoor environments. Addressing the stringent requirements of combiner boxes for high efficiency, compactness, robustness, and intelligence, this article develops a practical and optimized MOSFET selection strategy based on scenario-specific adaptation.
I. Core Selection Principles and Scenario Adaptation Logic
(A) Core Selection Principles: Multi-Dimensional Co-optimization
MOSFET selection requires a balanced consideration across key dimensions—voltage rating, conduction loss, switching capability, package, and ruggedness—ensuring precise alignment with the high-voltage DC environment and mission-critical operation:
Adequate Voltage Ruggedness: For typical PV string voltages (up to 600V-1000V system), prioritize devices with sufficient voltage margin (≥100-150V above max operating voltage) to withstand lightning surges, switching spikes, and potential induced degradation (PID). For a 600V max system, 700V-rated devices are a minimum.
Ultra-Low Conduction Loss Priority: Minimizing Rds(on) is paramount for main current paths to reduce power loss and thermal stress, directly boosting overall system energy yield. Low gate charge (Qg) is also crucial for efficient driving in frequently switching protection circuits.
Package for Power Density & Thermal Management: Choose packages like TO-263, TO-262, or TO-220 that offer a balance of high current capability, low thermal resistance, and mechanical robustness for compact, convection-cooled enclosures.
Maximum Reliability & Ruggedness: Devices must endure wide ambient temperature ranges (-40°C to 85°C+), high humidity, and continuous operation. Focus on avalanche energy rating, wide junction temperature range (e.g., -55°C ~ 150°C), and stable performance over lifetime.
(B) Scenario Adaptation Logic: Categorization by Circuit Function
Divide applications into three core scenarios: First, Main Confluence & Disconnect Switching (Power Core), requiring very high continuous current and ultra-low Rds(on). Second, String-Level Smart Bypass & Protection (Safety-Critical), requiring high voltage blocking, fast switching for fault isolation, and reliability. Third, Auxiliary Power & Monitoring Circuit (Functional Support), requiring low-voltage, low-power consumption for efficient system management.
II. Detailed MOSFET Selection Scheme by Scenario
(A) Scenario 1: Main Confluence & Disconnect Switch – Power Core Device
This circuit handles the summed current from multiple PV strings (tens to over a hundred Amps), demanding minimal voltage drop and high efficiency.
Recommended Model: VBM2603 (Single-P-MOS, -60V, -120A, TO-220)
Parameter Advantages: Ultra-low Rds(on) of 3mΩ at 10V drastically reduces conduction loss. High continuous current of 120A suits high-current busbars. TO-220 package facilitates excellent heat sinking via chassis connection. P-Channel configuration simplifies high-side switching for bus disconnect.
Adaptation Value: For a 100A main bus, conduction loss is only 30W per device (with parallel use for margin, loss is even lower), increasing overall box efficiency to >99.5%. Enables efficient, low-loss main circuit breaking for maintenance or emergency shutdown.
Selection Notes: Verify total max array current and required safety margin. Parallel devices may be needed for current sharing. Ensure robust gate drive (≥2A peak) to handle high Qg. Implement significant heatsinking.
(B) Scenario 2: String-Level Smart Bypass & Protection – Safety-Critical Device
Per-string bypass/protection requires blocking full string voltage (up to 600V+), handling string current (typically 10-20A), and switching reliably for fault isolation or optimizer functionality.
Recommended Model: VBN16R20S (Single-N-MOS, 600V, 20A, TO-262)
Parameter Advantages: 600V rating provides headroom for 500-550V systems. Low Rds(on) of 150mΩ at 10V balances low loss and cost. 20A continuous current meets typical string ratings. TO-262 (D2PAK) package offers good power handling and thermal performance. SJ_Multi-EPI technology provides good switching robustness.
Adaptation Value: Enables fast, reliable isolation of faulty strings (<10ms), preventing power loss from affecting healthy strings. Low conduction loss minimizes impact on normal string operation. Supports intelligent reconfiguration strategies.
Selection Notes: Match voltage rating to maximum system open-circuit voltage (VOC) with margin. Calculate worst-case conduction loss per string. Use isolated gate driver ICs (e.g., based on Si823x) for safe high-side drive. Consider avalanche energy rating for surge events.
(C) Scenario 3: Auxiliary Power & Monitoring Circuit – Functional Support Device
Auxiliary circuits power MCUs, communication modules (PLC, WiFi), and sensors, requiring efficient low-voltage switching from a derived low-voltage rail (e.g., 12V/24V).
Recommended Model: VB1240 (Single-N-MOS, 20V, 6A, SOT23-3)
Parameter Advantages: Very low Rds(on) of 28mΩ at 4.5V and 42mΩ at 2.5V, ideal for low-voltage rails. Low threshold voltage (Vth 0.5-1.5V) allows direct drive from 3.3V MCU GPIO. SOT23-3 package saves critical board space. 6A rating provides ample margin for auxiliary loads.
Adaptation Value: Enables high-efficiency power gating for various monitoring modules, reducing standby consumption of the control system. Its small size allows for high-density placement near microcontrollers and sensors.
Selection Notes: Ensure auxiliary rail voltage is well below 20V rating. For loads >2A, ensure adequate PCB copper for heat dissipation. Add a small gate resistor to damp ringing.
III. System-Level Design Implementation Points
(A) Drive Circuit Design: Matching High-Voltage Environment
VBM2603: Requires a charge pump or bootstrap circuit for high-side P-MOS drive. Ensure gate drive voltage (Vgs) is stable (-10V to -12V) for full enhancement.
VBN16R20S: Mandatory use of isolated gate driver ICs for each string switch to handle different common-mode voltages. Keep gate drive loops short. Use negative turn-off voltage (e.g., -5V) if available, to enhance noise immunity in noisy HV environment.
VB1240: Can be driven directly by MCU GPIO. A series gate resistor (4.7Ω-22Ω) is recommended. For higher frequency switching in DC-DC circuits, ensure MCU drive strength is adequate.
(B) Thermal Management Design: Compact Enclosure Constraints
VBM2603: Must be mounted on a dedicated heatsink, likely connected to the metal enclosure. Use thermal interface material. Consider derating current significantly for ambient temperatures above 60°C.
VBN16R20S: Provide generous copper pour on PCB (≥500mm² per device) with multiple thermal vias to an internal heatsink or the backplate. Spacing between devices is critical to avoid thermal coupling.
VB1240: Local copper pour (≥30mm²) is usually sufficient. Ensure overall board layout allows for airflow.
General: In sealed enclosures, rely on conduction cooling to the outer casing. Place high-power devices close to thermal transfer points.
(C) EMC and Reliability Assurance for Harsh Outdoor Use
EMC Suppression:
Add RC snubbers (e.g., 10Ω + 2.2nF) across drain-source of VBN16R20S to damp high-frequency ringing during switching.
Use ferrite beads on gate drive paths for all high-side switches.
Implement strict partitioning: keep high-voltage/high-current loops tight and away from sensitive analog/monitoring circuits.
Reliability & Protection:
Surge/Transient Protection: Place MOVs and gas discharge tubes (GDTs) at PV input terminals. Use TVS diodes (e.g., SMCJ600A) at the drain of each VBN16R20S for additional clamping.
Overcurrent Protection: Implement hall-effect sensors or shunt resistors on each string/ main path, coupled with fast comparator circuits to trigger MOSFET shut-off.
Desaturation Detection: For VBN16R20S, use driver ICs with desat protection to prevent shoot-through and manage short-circuit events.
Conformal Coating: Apply conformal coating to the entire PCB to protect against humidity, dust, and corrosion.
IV. Scheme Core Value and Optimization Suggestions
(A) Core Value
Maximized Energy Harvest: Ultra-low loss main switch and string switches minimize "box-level" losses, directly increasing system Annual Energy Production (AEP).
Enhanced Safety & Intelligence: Robust, fast-acting string-level MOSFETs enable granular fault management and safe maintenance, forming the basis for smart combiner functionality.
Optimized Power Density & Reliability: Selected package portfolio allows for a compact, serviceable design capable of enduring decades of harsh outdoor operation, reducing total cost of ownership.
(B) Optimization Suggestions
Power Scaling: For systems with higher string currents (>15A), consider VBL17R15SE (700V, 15A, Rds(on)=260mΩ). For main disconnect in larger boxes, parallel more VBM2603 or seek similar devices in TO-247 packages.
Voltage Scaling: For 1000V+ PV systems, select devices from the 700V-800V class like VBL17R05SE or VBFB17R02, carefully evaluating their Rds(on) vs. current trade-off.
Integration Path: For space-constrained designs, explore multi-channel MOSFET arrays in single packages for string protection. For the auxiliary side, consider load switches with integrated protection features.
Ruggedness Upgrade: For applications in regions with extreme lightning activity, specify MOSFETs with higher avalanche energy ratings and enhance external protection circuits accordingly.
Conclusion
Strategic MOSFET selection is fundamental to achieving high efficiency, robust protection, and intelligent management in next-generation photovoltaic combiner boxes. This scenario-based adaptation scheme provides a clear technical roadmap for R&D engineers through precise application matching and rigorous system-level design considerations. Future development can explore the use of SiC MOSFETs for the highest efficiency and switching speed demands, further solidifying the role of the combiner box as a cornerstone of reliable and high-yield solar power plants.

Detailed Scenario Topology Diagrams