With the rapid advancement of global renewable energy integration and grid modernization, containerized energy storage systems (ESS) have become pivotal for energy management, peak shaving, and grid stability. Their power conversion systems (PCS), battery management systems (BMS), and auxiliary units, serving as the core for energy control and conversion, directly determine the system's round-trip efficiency, power density, thermal performance, and long-term operational reliability. The power semiconductor devices (MOSFETs/IGBTs), as the key switching components, significantly impact overall system performance, loss distribution, and service life through their selection. Addressing the high-power, high-voltage, continuous cycling, and stringent safety requirements of MW-scale containerized ESS, this article proposes a complete, actionable power device selection and design implementation plan with a scenario-oriented and systematic approach.
I. Overall Selection Principles: System Compatibility and Balanced Design
Selection should achieve an optimal balance among voltage/current rating, switching/ conduction losses, thermal capability, and package robustness to match the high-stress, long-duration operation of ESS.
Voltage and Current Margin Design: Based on DC link voltage (typically up to 1500V for high-power systems) and battery stack voltage, select devices with a voltage rating margin of ≥30-40% to withstand switching spikes and grid transients. The continuous current rating must accommodate RMS and peak currents with a derating factor, ensuring operation below 70-80% of the device's maximum rating at worst-case temperatures.
Low Loss Priority: Total loss directly affects efficiency and cooling requirements. For MOSFETs, low Rds(on) minimizes conduction loss. Low gate charge (Qg) and output capacitance (Coss) reduce switching loss, enabling higher effective switching frequencies. For IGBTs, low VCE(sat) and fast switching are critical. Combining low-loss devices with advanced topologies (e.g., 3-level) is key for >98% system efficiency.
Package and Thermal Coordination: High-power stages demand packages with very low thermal resistance and high isolation capability (e.g., TO-247, TOLL, TO-263). Thermal interface materials, heatsinks, and liquid cooling must be considered from the layout stage. Parallel device use requires attention to static/dynamic current sharing.
Reliability and Ruggedness: ESS operate in varying environmental conditions with 10-15+ year lifespans. Focus on device junction temperature max (Tjmax), short-circuit withstand capability, avalanche energy rating, and parameter stability over time and temperature cycles.
II. Scenario-Specific Device Selection Strategies
The main power stages in a 1MW/2MWh containerized ESS include the bi-directional DC-AC inverter, DC-DC converters (for battery interface), and auxiliary power supplies. Each stage has distinct requirements.
Scenario 1: Bi-directional DC-AC Inverter / High-Voltage DC-DC Stage (Central Inverter, 500V-1500V DC Link)
This stage handles the full system power, requiring very high voltage blocking, low switching loss, and high reliability.
Recommended Model: VBP113MI25B (Single N-MOS, 1350V, 25A, TO247)
Parameter Advantages:
Very high voltage rating (1350V) suitable for 1000-1500V DC bus systems with sufficient margin.
Planar/BD technology offers a robust balance of switching performance and voltage capability.
TO-247 package allows for excellent thermal coupling to large heatsinks or cold plates.
Scenario Value:
Enables the use of higher DC bus voltages, reducing current for the same power level and minimizing conduction losses in cables and magnetics.
Suitable for multi-level inverter topologies (e.g., T-Type, NPC) where high-voltage blocking devices are required on the outer switches.
Design Notes:
Requires careful gate drive design with sufficient drive voltage (>15V) and negative turn-off capability for robust operation.
Must be protected with snubbers and active clamping circuits against voltage overshoot during switching.
Scenario 2: Battery-Side Bi-directional DC-DC Converter (Low-Voltage High-Current Stage)
This stage interfaces the battery stack (e.g., 48V to 800V) with the DC link, requiring very low conduction loss and high current capability.
Recommended Model: VBL1615 (Single N-MOS, 60V, 75A, TO263)
Parameter Advantages:
Extremely low Rds(on) (11 mΩ @10V) minimizes conduction loss, which is critical for high current paths.
High continuous current (75A) supports parallel operation for multi-kW converter phases.
TO-263 (D2PAK) package offers a good balance of current handling, thermal performance, and PCB footprint.
Scenario Value:
Ideal for synchronous rectification in buck/boost phases of non-isolated or isolated battery DC-DC converters.
Low gate threshold voltage (Vth=1.7V) allows for efficient drive from low-voltage controllers.
Design Notes:
Layout must minimize parasitic inductance in the high-current loop (drain-source) to reduce voltage spikes.
Parallel devices require matched gate resistors and symmetric PCB layout to ensure current sharing.
Scenario 3: Auxiliary Power Supply & Protection Switching (Fan, Pump, Contactors, AC/DC Aux)
These loads control system cooling, isolation, and auxiliary power, requiring compact, efficient switching and protection features.
Recommended Model: VBM16I30 (IGBT with FRD, 600V/650V, 30A, TO220)
Parameter Advantages:
IGBT structure is advantageous for switching inductive loads (contactors, pump motors) at moderate frequencies due to robust SOA.
Integrated Fast Recovery Diode (FRD) simplifies design for freewheeling paths.
Low VCE(sat) (1.65V @15V) ensures low conduction loss.
TO220 package is versatile and easy to mount on medium-sized heatsinks.
Scenario Value:
Excellent for AC-side auxiliary contactor control or fan/pump motor drives where load inductance is significant.
Provides a cost-effective and rugged solution for medium-power auxiliary switching compared to high-current MOSFETs in similar applications.
Design Notes:
Gate drive voltage should be optimized (typically 15V) to minimize VCE(sat). Include negative turn-off for faster switching.
Utilize the integrated FRD for inductive load demagnetization, but ensure its reverse recovery characteristics are compatible with the operating frequency.
III. Key Implementation Points for System Design
Drive Circuit Optimization:
High-Voltage MOSFET (VBP113MI25B): Use isolated gate driver ICs with high peak current capability (>2A) and negative bias turn-off to ensure fast, safe switching and prevent Miller turn-on.
Low-Voltage High-Current MOSFET (VBL1615): Use drivers capable of sourcing/sinking high current to charge/discharge the high gate capacitance quickly, minimizing transition losses. Active Miller clamp circuits are recommended if used in bridge configurations.
IGBT (VBM16I30): Standard IGBT drivers with appropriate gate resistors to control dv/dt and di/dt, balancing loss and EMI.
Thermal Management Design:
Tiered Strategy: VBP113MI25B and VBM16I30 typically require forced air or liquid cooling via large heatsinks. VBL1615 may rely on PCB copper area plus a heatsink, depending on current.
Monitoring: Implement Tj estimation or direct temperature sensing on critical heatsinks to enable derating or fault protection.
EMC and Reliability Enhancement:
Snubbing & Clamping: Use RC snubbers across devices and/or clamping circuits to limit voltage overshoot, especially for high-voltage MOSFETs.
Protection: Implement comprehensive overcurrent (desat detection for IGBTs), overtemperature, and overvoltage protection. Use TVS diodes on gate drivers and varistors at key inputs for surge immunity.
IV. Solution Value and Expansion Recommendations
Core Value:
High Efficiency & Power Density: The combination of a high-voltage MOSFET, ultra-low Rds(on) MOSFET, and efficient IGBT enables optimized efficiency across different power stages, supporting high power density cabinet design.
High Reliability for Demanding Duty Cycles: Selected devices with robust packages and appropriate ratings ensure stable operation under continuous charge/discharge cycles and environmental stress.
System Cost Optimization: Balanced device selection per application avoids over-specification, providing a cost-effective total solution.
Optimization and Adjustment Recommendations:
Power Scaling: For higher current phases, parallel more VBL1615 devices or consider modules in TO-247 packages with higher current ratings.
Technology Upgrade: For the highest efficiency in the DC-DC stage, consider using latest-generation trench or superjunction MOSFETs with even lower Rds(on) in similar packages.
Integration Path: For the main inverter, consider moving to pre-assembled power modules (IPMs or custom hybrid modules) for reduced parasitic inductance and improved manufacturability at the multi-hundred kW level.
The selection of power semiconductors is foundational to achieving the performance, efficiency, and reliability targets of MW-scale containerized energy storage systems. The scenario-based selection and systematic design methodology outlined here aim to provide a balanced, practical approach. As wide-bandgap devices (SiC, GaN) mature, their integration into future ESS designs will enable even higher switching frequencies, reduced losses, and further miniaturization, driving the next evolution of grid-scale energy storage technology.

Detailed Device Application Diagrams