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MOSFET and IGBT Selection Strategy and Device Adaptation Handbook for Energy Storage Systems in Paper Mills with High-Efficiency and Reliability Requirements
ESS Device Selection Topology for Paper Mills

ESS Power Device Selection Strategy - Overall Topology

graph LR %% Energy Storage System Core Architecture subgraph "Paper Mill Energy Storage System" GRID["Grid Connection
400V AC"] --> PCC["Point of Common Coupling"] PCC --> BIDIRECTIONAL_INV["Bidirectional Inverter/Converter"] BIDIRECTIONAL_INV --> DC_BUS["DC Bus
400-600V"] DC_BUS --> BATTERY_PACK["Battery Pack
48V/96V/400V"] DC_BUS --> AUX_POWER["Auxiliary Power Distribution"] end %% Three Core Application Scenarios subgraph "Scenario 1: High-Voltage Inverter/Converter (10-100kW)" INV_IN["DC Bus Input"] --> VBPB165I60_1["VBPB165I60 IGBT
600V/60A"] VBPB165I60_1 --> INV_OUT["AC Output to Grid/Load"] INV_CONTROLLER["Inverter Controller"] --> DRIVER_IGBT["IGBT Driver"] DRIVER_IGBT --> VBPB165I60_1 INV_OUT --> FILTER["LC Filter"] FILTER --> GRID_TIE["Grid Tie/Backup"] end subgraph "Scenario 2: High-Current Battery Management (50-200A)" BAT_IN["Battery Pack"] --> VBGM11203_1["VBGM11203 MOSFET
120V/120A"] VBGM11203_1 --> BMS_BUS["BMS Power Bus"] BMS_CONTROLLER["BMS Controller"] --> DRIVER_MOS["MOSFET Driver"] DRIVER_MOS --> VBGM11203_1 BMS_BUS --> BALANCING["Cell Balancing"] BMS_BUS --> PROTECTION["Protection Circuit"] end subgraph "Scenario 3: Auxiliary Power Control (1-5kW)" AUX_IN["High-Voltage DC Bus"] --> VBMB17R05SE_1["VBMB17R05SE MOSFET
700V/5A"] VBMB17R05SE_1 --> LOAD_BUS["Auxiliary Load Bus"] CONTROL_MCU["Control MCU"] --> ISOLATED_DRIVER["Isolated Driver"] ISOLATED_DRIVER --> VBMB17R05SE_1 LOAD_BUS --> FAN_DRIVE["Cooling Fan Drive"] LOAD_BUS --> SENSOR_PWR["Sensor Power"] LOAD_BUS --> COMM_PWR["Communication Power"] end %% System Protection & Management subgraph "Protection & Monitoring System" OVERCURRENT["Overcurrent Protection"] --> FAULT_LATCH["Fault Latch"] OVERVOLTAGE["Overvoltage Protection"] --> FAULT_LATCH OVERTEMP["Overtemperature Protection"] --> FAULT_LATCH FAULT_LATCH --> SHUTDOWN["System Shutdown"] NTC_SENSORS["NTC Temperature Sensors"] --> THERMAL_MGMT["Thermal Management"] CURRENT_SENSE["Current Sensing"] --> POWER_MONITOR["Power Monitor"] POWER_MONITOR --> EMS["Energy Management System"] end %% Thermal Management subgraph "Three-Level Thermal Management" LEVEL1["Level 1: Liquid/Air Cooling
High-Power IGBTs"] --> VBPB165I60_1 LEVEL2["Level 2: Forced Air Cooling
High-Current MOSFETs"] --> VBGM11203_1 LEVEL3["Level 3: Natural Cooling
Auxiliary MOSFETs"] --> VBMB17R05SE_1 LEVEL1 --> HEATSINK_IGBT["TO3P Heatsink"] LEVEL2 --> HEATSINK_MOS["TO220 Heatsink"] LEVEL3 --> PCB_COPPER["PCB Copper Pour"] end %% Connections DC_BUS --> INV_IN BATTERY_PACK --> BAT_IN AUX_POWER --> AUX_IN VBPB165I60_1 --> THERMAL_MGMT VBGM11203_1 --> THERMAL_MGMT VBMB17R05SE_1 --> THERMAL_MGMT %% Style Definitions style VBPB165I60_1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style VBGM11203_1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style VBMB17R05SE_1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style INV_CONTROLLER fill:#fce4ec,stroke:#e91e63,stroke-width:2px

With the advancement of industrial energy management and the demand for sustainable operations, energy storage systems in paper mills have become core equipment for stabilizing power supply, peak shaving, and backup power. The power conversion and switching systems, serving as the "heart and muscles" of the entire unit, provide precise power control for key loads such as inverters, battery management, and auxiliary circuits. The selection of power MOSFETs and IGBTs directly determines system efficiency, EMC performance, power density, and reliability. Addressing the stringent requirements of paper mill environments for safety, energy efficiency, high power, and durability, this article focuses on scenario-based adaptation to develop a practical and optimized device selection strategy.
I. Core Selection Principles and Scenario Adaptation Logic
(A) Core Selection Principles: Four-Dimensional Collaborative Adaptation
Device selection requires coordinated adaptation across four dimensions—voltage, loss, package, and reliability—ensuring precise matching with system operating conditions:
Sufficient Voltage Margin: For typical DC buses (e.g., 400V, 600V) in energy storage, reserve a rated voltage withstand margin of ≥50% to handle voltage spikes and grid fluctuations. For example, prioritize devices with ≥600V for a 400V bus.
Prioritize Low Loss: Prioritize devices with low Rds(on) or VCEsat (reducing conduction loss), low switching charges (reducing switching loss), adapting to continuous or cyclic operation, improving energy efficiency, and reducing thermal stress.
Package Matching: Choose TO247/TO3P packages with low thermal resistance for high-power modules (e.g., inverters). Select compact packages like DFN/TO220 for medium-power circuits, balancing power density and heat dissipation.
Reliability Redundancy: Meet 24/7 industrial durability requirements, focusing on thermal stability, surge protection, and wide junction temperature range (e.g., -40°C ~ 150°C), adapting to harsh environments like paper mills with dust and humidity.
(B) Scenario Adaptation Logic: Categorization by Load Type
Divide loads into three core scenarios based on function: First, high-voltage inverter/converter (power core), requiring high-voltage, high-efficiency switching. Second, high-current battery management (functional support), requiring low-loss, high-current handling. Third, auxiliary power control (safety-critical), requiring reliable on/off and fault isolation. This enables precise parameter-to-need matching.
II. Detailed Device Selection Scheme by Scenario
(A) Scenario 1: High-Voltage Inverter/Converter (10kW-100kW) – Power Core Device
Inverters or DC-DC converters in energy storage require handling high voltages (e.g., 400V-600V) and moderate currents, demanding efficient, fast switching for grid-tie or backup power.
Recommended Model: VBPB165I60 (IGBT+FRD, 600/650V, 60A, TO3P)
Parameter Advantages: FS technology with integrated FRD achieves low VCEsat of 1.7V at 15V, reducing conduction loss. 600/650V withstand voltage suits 400V DC buses with margin. TO3P package offers robust thermal performance (low RthJC). Fast switching capability enhances inverter efficiency.
Adaptation Value: Enables high-frequency switching up to 20kHz, improving power density. For a 400V/20kW inverter, device loss is optimized, increasing system efficiency to >98%. Supports overcurrent and overtemperature protection via driver ICs, ensuring reliability in cyclic loads.
Selection Notes: Verify DC link voltage and peak current, reserving margin for transients. Use with IGBT drivers like IR2110 (gate drive current ≥2A). Ensure proper snubber circuits to limit voltage spikes.
(B) Scenario 2: High-Current Battery Management (50A-200A) – Functional Support Device
Battery management systems (BMS) or DC-DC converters require handling large continuous currents from battery packs, demanding ultra-low conduction loss for energy savings and thermal management.
Recommended Model: VBGM11203 (N-MOS, 120V, 120A, TO220)
Parameter Advantages: SGT technology achieves an Rds(on) as low as 3.5mΩ at 10V. Continuous current of 120A suits 48V or higher battery buses. TO220 package provides good heat dissipation with thermal resistance ≤50°C/W.
Adaptation Value: Significantly reduces conduction loss. For a 48V/100A battery discharge path, single device loss is only 0.35W, increasing efficiency to over 99%. Supports fast switching for PWM control, enabling precise current regulation and extending battery life.
Selection Notes: Match with battery voltage (e.g., 48V bus, use ≥80V devices). Provide ≥300mm² copper pour or heatsink for TO220. Use with BMS ICs featuring balance and protection functions.
(C) Scenario 3: Auxiliary Power Control (1kW-5kW) – Safety-Critical Device
Auxiliary circuits (e.g., fan drives, sensor power) require reliable on/off control and fault isolation to ensure system safety and low standby power.
Recommended Model: VBMB17R05SE (N-MOS, 700V, 5A, TO220F)
Parameter Advantages: SJ_Deep-Trench technology offers high voltage withstand (700V) with Rds(on) of 840mΩ at 10V. TO220F package (fully isolated) enhances safety and heat dissipation. Vth of 3.5V allows direct drive by 5V/12V control circuits.
Adaptation Value: Enables high-side switching for auxiliary loads on high-voltage buses (e.g., 400V), with isolation voltage up to 2500V. Control response time <5ms ensures quick fault shutdown, improving system safety.
Selection Notes: Verify load current (<3.5A for derating). Add gate series resistor (10Ω-220Ω) to suppress ringing. Use with optocouplers or level shifters for high-voltage control.
III. System-Level Design Implementation Points
(A) Drive Circuit Design: Matching Device Characteristics
VBPB165I60: Pair with dedicated IGBT drivers (e.g., IR2184) providing negative bias for turn-off. Add 100nF bootstrap capacitor and TVS for gate protection. Optimize layout to minimize loop inductance.
VBGM11203: Drive with MCU PWM via gate driver IC (e.g., TC4420) with current ≥2A. Add 10Ω gate resistor and 1nF gate-source capacitor for stability. Use Kelvin connection for source pin.
VBMB17R05SE: Direct drive by optocoupler or isolated driver for high-voltage side. Add 100kΩ pull-down resistor on gate to prevent false triggering. Include snubber network (RC) across drain-source.
(B) Thermal Management Design: Tiered Heat Dissipation
VBPB165I60: Focus on heatsinking; use forced air cooling or liquid cooling for high power. Mount on heatsink with thermal paste, ensuring junction temperature ≤125°C. Derate current by 20% above 80°C ambient.
VBGM11203: Use TO220 heatsink with ≥2°C/W thermal resistance. Provide ≥500mm² copper pour on PCB. Monitor temperature via NTC thermistor.
VBMB17R05SE: Local heatsink or ≥100mm² copper pour suffices for low current. Ensure isolation clearance per high-voltage standards.
(C) EMC and Reliability Assurance
EMC Suppression
VBPB165I60: Add RC snubber across collector-emitter. Use ferrite beads on gate leads. Implement shielded cabling for inverter output.
VBGM11203: Add 100pF-470pF high-frequency capacitor parallel to drain-source. Place decoupling capacitors near device terminals.
VBMB17R05SE: Add common-mode choke and Y-capacitors at auxiliary power input. Use twisted-pair wiring for control signals.
Implement PCB zoning: separate high-power, low-power, and digital areas. Add surge protection at AC/DC inputs.
Reliability Protection
Derating Design: Operate devices at ≤80% of rated voltage and ≤70% of rated current under worst-case conditions (e.g., high temperature).
Overcurrent/Overtemperature Protection: For VBGM11203, use shunt resistor + op-amp for current sensing. For VBPB165I60, use driver IC with desaturation detection.
ESD/Surge Protection: Add TVS diodes (e.g., SMCJ600A) at high-voltage nodes. Use varistors and fuses at system entry points.
IV. Scheme Core Value and Optimization Suggestions
(A) Core Value
Full-Chain Energy Efficiency Optimization: System efficiency increases to >97%, reducing energy loss by 15%-20% and lowering operating costs.
Safety and Robustness Combined: High-voltage isolation and fault control enhance personnel and equipment safety. Industrial-grade packages withstand harsh environments.
Balanced Reliability and Cost-Effectiveness: Mature mass-production devices ensure stable supply and cost advantages over SiC devices for medium-power applications.
(B) Optimization Suggestions
Power Adaptation: For >150kW inverters, choose higher-current IGBTs (e.g., 100A+). For <500W auxiliary loads, use VBA1101N (100V, 16A, SOP8) for compactness.
Integration Upgrade: Use IPM modules for inverter drives to simplify design. For battery switches, consider parallelizing VBGM11203 for higher current.
Special Scenarios: Choose automotive-grade variants for high-vibration areas. For low-noise requirements, optimize switching frequency and snubber design.
Battery System Specialization: Pair VBGM11203 with bidirectional DC-DC controllers (e.g., LM5170) for efficient charge/discharge cycles.
Conclusion
Power MOSFET and IGBT selection is central to achieving high efficiency, reliability, and safety in paper mill energy storage systems. This scenario-based scheme provides comprehensive technical guidance for R&D through precise load matching and system-level design. Future exploration can focus on SiC devices and digital power modules, aiding in the development of next-generation high-performance energy storage products to support sustainable industrial operations.

Detailed Device Application Diagrams

Scenario 1: High-Voltage Inverter/Converter Detail

graph LR subgraph "Three-Phase Inverter Bridge (10-100kW)" DC_IN["DC Bus 400-600V"] --> PHASE_A["Phase A Leg"] DC_IN --> PHASE_B["Phase B Leg"] DC_IN --> PHASE_C["Phase C Leg"] subgraph "Phase A" Q_AH["VBPB165I60
High Side"] Q_AL["VBPB165I60
Low Side"] end subgraph "Phase B" Q_BH["VBPB165I60
High Side"] Q_BL["VBPB165I60
Low Side"] end subgraph "Phase C" Q_CH["VBPB165I60
High Side"] Q_CL["VBPB165I60
Low Side"] end PHASE_A --> Q_AH PHASE_A --> Q_AL PHASE_B --> Q_BH PHASE_B --> Q_BL PHASE_C --> Q_CH PHASE_C --> Q_CL Q_AH --> OUTPUT_A["Phase A Output"] Q_AL --> GND Q_BH --> OUTPUT_B["Phase B Output"] Q_BL --> GND Q_CH --> OUTPUT_C["Phase C Output"] Q_CL --> GND end subgraph "Driver & Protection Circuit" DRIVER_IC["IR2184 Driver"] --> BOOTSTRAP["Bootstrap Circuit"] BOOTSTRAP --> Q_AH DRIVER_IC --> Q_AL DRIVER_IC --> Q_BH DRIVER_IC --> Q_BL DRIVER_IC --> Q_CH DRIVER_IC --> Q_CL subgraph "Snubber Networks" RCD_SNUBBER["RCD Snubber"] --> Q_AH RC_SNUBBER["RC Snubber"] --> Q_AL TVS_ARRAY["TVS Protection"] --> DRIVER_IC end DESAT_PROTECTION["Desaturation Detection"] --> FAULT["Fault Output"] FAULT --> CONTROLLER["Microcontroller"] end OUTPUT_A --> FILTER_LC["LC Output Filter"] OUTPUT_B --> FILTER_LC OUTPUT_C --> FILTER_LC FILTER_LC --> GRID_CONNECTION["Grid/Load Connection"] style Q_AH fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_AL fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

Scenario 2: High-Current Battery Management Detail

graph LR subgraph "Battery Pack Configuration" BAT_POS["Battery Positive"] --> CELL_STACK["Series Cell Stack
48V/96V/400V"] CELL_STACK --> BAT_NEG["Battery Negative"] CELL_STACK --> BALANCE_NODES["Balance Nodes"] end subgraph "Main Charge/Discharge Path" BAT_POS --> MAIN_SWITCH["Main Switch"] MAIN_SWITCH --> SHUNT_RESISTOR["Shunt Resistor"] SHUNT_RESISTOR --> VBGM11203_ARRAY["VBGM11203 MOSFET Array"] subgraph "Parallel MOSFET Array" MOS1["VBGM11203
120V/120A"] MOS2["VBGM11203
120V/120A"] MOS3["VBGM11203
120V/120A"] end VBGM11203_ARRAY --> MOS1 VBGM11203_ARRAY --> MOS2 VBGM11203_ARRAY --> MOS3 MOS1 --> POWER_BUS["Power Bus"] MOS2 --> POWER_BUS MOS3 --> POWER_BUS POWER_BUS --> LOAD_CONN["Load Connection"] end subgraph "BMS Control System" BMS_IC["BMS Controller IC"] --> CELL_MONITOR["Cell Voltage Monitoring"] CELL_MONITOR --> BALANCE_NODES BMS_IC --> BALANCE_SWITCHES["Balance Switches"] BALANCE_SWITCHES --> BALANCE_NODES BMS_IC --> GATE_DRIVER["Gate Driver TC4420"] GATE_DRIVER --> MAIN_SWITCH GATE_DRIVER --> VBGM11203_ARRAY SHUNT_RESISTOR --> CURRENT_AMP["Current Amplifier"] CURRENT_AMP --> BMS_IC NTC_SENSOR["NTC Sensor"] --> TEMP_ADC["Temperature ADC"] TEMP_ADC --> BMS_IC end subgraph "Protection Circuits" OVERCURRENT_COMP["Overcurrent Comparator"] --> PROTECTION_LOGIC["Protection Logic"] OVERVOLTAGE_COMP["Overvoltage Comparator"] --> PROTECTION_LOGIC UNDERVOLTAGE_COMP["Undervoltage Comparator"] --> PROTECTION_LOGIC PROTECTION_LOGIC --> FAULT_SIGNAL["Fault Signal"] FAULT_SIGNAL --> BMS_IC FAULT_SIGNAL --> GATE_DRIVER end style MOS1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style MOS2 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Scenario 3: Auxiliary Power Control Detail

graph LR subgraph "High-Side Switch Configuration" HV_DC["High-Voltage DC Bus
400-600V"] --> VBMB17R05SE_SW["VBMB17R05SE
700V/5A"] VBMB17R05SE_SW --> LOAD_OUTPUT["Auxiliary Load"] LOAD_OUTPUT --> LOAD_GROUND["Load Ground"] end subgraph "Isolated Drive Circuit" CONTROL_MCU["Control MCU
3.3V/5V"] --> OPTOCOUPLER["Optocoupler/Isolator"] OPTOCOUPLER --> GATE_DRIVE["Gate Drive Circuit"] GATE_DRIVE --> VBMB17R05SE_SW subgraph "Gate Protection" PULL_DOWN["100kΩ Pull-down"] --> GATE_DRIVE TVS_GATE["TVS Diode"] --> GATE_DRIVE GATE_RESISTOR["10-220Ω Series R"] --> GATE_DRIVE end end subgraph "Load Distribution Network" subgraph "Fan Drive Circuit" FAN_PWR["12V Fan Power"] --> FAN_MOS["VBG3638 MOSFET"] FAN_MOS --> FAN_LOAD["Cooling Fan"] PWM_CONTROL["PWM Control"] --> FAN_MOS end subgraph "Sensor Power" SENSOR_REG["LDO Regulator"] --> SENSOR_3V3["3.3V Sensors"] SENSOR_REG --> SENSOR_5V["5V Sensors"] ENABLE_SENSOR["Enable Control"] --> SENSOR_REG end subgraph "Communication Power" ISOLATED_DCDC["Isolated DC-DC"] --> COMM_5V["5V Comm Power"] COMM_5V --> CAN_TRANS["CAN Transceiver"] COMM_5V --> RS485["RS485 Transceiver"] COMM_5V --> ETHERNET["Ethernet PHY"] end end subgraph "Protection & Monitoring" CURRENT_LIMIT["Current Limit Circuit"] --> LOAD_OUTPUT OVERTEMP_SHUTDOWN["Overtemp Shutdown"] --> GATE_DRIVE FAULT_FEEDBACK["Fault Feedback"] --> CONTROL_MCU end style VBMB17R05SE_SW fill:#fff3e0,stroke:#ff9800,stroke-width:2px style FAN_MOS fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

Thermal Management & Protection Topology

graph LR subgraph "Three-Level Cooling Architecture" LEVEL1_SUB["Level 1: Liquid/Air Cooling"] --> IGBT_HEATSINK["TO3P Liquid Cold Plate"] LEVEL2_SUB["Level 2: Forced Air Cooling"] --> MOSFET_HEATSINK["TO220 Aluminum Heatsink"] LEVEL3_SUB["Level 3: Natural Cooling"] --> PCB_THERMAL["2oz Copper + Thermal Vias"] IGBT_HEATSINK --> VBPB165I60_2["VBPB165I60 IGBTs"] MOSFET_HEATSINK --> VBGM11203_2["VBGM11203 MOSFETs"] PCB_THERMAL --> VBMB17R05SE_2["VBMB17R05SE MOSFETs"] end subgraph "Temperature Monitoring System" NTC1["NTC on IGBT Heatsink"] --> ADC1["ADC Channel 1"] NTC2["NTC on MOSFET Heatsink"] --> ADC2["ADC Channel 2"] NTC3["NTC Ambient"] --> ADC3["ADC Channel 3"] ADC1 --> THERMAL_MCU["Thermal Management MCU"] ADC2 --> THERMAL_MCU ADC3 --> THERMAL_MCU end subgraph "Active Cooling Control" THERMAL_MCU --> FAN_PWM["Fan PWM Controller"] THERMAL_MCU --> PUMP_CONTROL["Pump Speed Control"] FAN_PWM --> COOLING_FAN["Cooling Fans"] PUMP_CONTROL --> LIQUID_PUMP["Liquid Pump"] end subgraph "EMC & Protection Network" subgraph "Snubber Circuits" RCD_IGBT["RCD Snubber"] --> VBPB165I60_2 RC_MOSFET["RC Snubber"] --> VBGM11203_2 GATE_SNUBBER["Gate RC"] --> VBMB17R05SE_2 end subgraph "Surge Protection" TVS_AC_IN["TVS at AC Input"] --> GRID_INTERFACE VARISTOR_DC["Varistor at DC Bus"] --> DC_BUS_PROT GAS_DISCHARGE["Gas Discharge Tube"] --> COMM_LINES end subgraph "Current Protection" SHUNT_IGBT["Shunt for IGBT"] --> DESAT_DETECT["Desaturation Detect"] SHUNT_MOSFET["Shunt for MOSFET"] --> CURRENT_LIMIT["Current Limit"] HALL_SENSOR["Hall Sensor"] --> OVERCURRENT["Overcurrent Trip"] end end subgraph "Reliability Enhancement" DERATING_CHECK["80% Voltage Derating"] --> DESIGN_VALID["Design Validation"] 70PCT_CURRENT["70% Current Derating"] --> DESIGN_VALID THERMAL_DERATING["Thermal Derating Curve"] --> DESIGN_VALID DESIGN_VALID --> SYSTEM_RELIABILITY["System Reliability"] end style VBPB165I60_2 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style VBGM11203_2 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style VBMB17R05SE_2 fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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