With the rapid development of data centers and critical industrial infrastructure, modular uninterruptible power supply (UPS) systems have become the cornerstone of power continuity. Their power conversion and battery management systems, acting as the "energy heart and control core," require robust, efficient, and highly reliable switching devices for critical stages like Power Factor Correction (PFC), DC-DC conversion, and inverter output. The selection of power MOSFETs is pivotal in determining the system's conversion efficiency, power density, thermal performance, and mean time between failures (MTBF). Addressing the stringent demands of modular UPS for scalability, efficiency, reliability, and serviceability, this article reconstructs the MOSFET selection logic based on application scenarios, providing an optimized, ready-to-implement solution. I. Core Selection Principles and Scenario Adaptation Logic Core Selection Principles Voltage Rating with Margin: For high-voltage bus (380V AC input, 800V DC link) and battery bank voltages (48V, 192V, 384V), MOSFET voltage ratings must incorporate significant safety margins (typically >20-30%) to withstand voltage spikes and transients. Optimized Loss Trade-off: Balance conduction loss (Rds(on)) and switching loss (Qg, Qgd) based on switching frequency. Prioritize low Rds(on) for high-current paths and fast-switching devices for high-frequency stages. Package for Power and Cooling: Select packages (e.g., TO-247, TO-263, D2PAK, DFN) based on power dissipation, current rating, and thermal management strategy (heatsink vs. PCB cooling). Reliability and Ruggedness: Ensure suitability for 24/7 operation with high surge current capability, avalanche robustness, and stable performance over a wide temperature range. Scenario Adaptation Logic Based on the key power stages within a modular UPS, MOSFET applications are categorized into three primary scenarios: High-Voltage Input/PFC Stage, Battery Interface/Isolated DC-DC Stage, and Low-Voltage Auxiliary Power/Signal Control Stage. Device parameters are matched to the specific voltage, current, and switching speed requirements of each stage. II. MOSFET Selection Solutions by Scenario Scenario 1: High-Voltage PFC & Inverter Stage (650V-850V Class) – High-Voltage Power Device Recommended Model: VBP185R07 (Single-N, 850V, 7A, TO-247) Key Parameter Advantages: 850V drain-source voltage rating provides ample margin for 380VAC three-phase input applications. Rds(on) of 1700mΩ @ 10V Vgs. Planar technology offers robust performance and good avalanche energy capability suitable for hard-switching topologies. Scenario Adaptation Value: The TO-247 package facilitates easy mounting on a heatsink, enabling effective heat dissipation for high-power modules. The 850V rating enhances system reliability against grid surges. Suitable for the boost stage in PFC circuits and the high-side switch in full-bridge inverters. Applicable Scenarios: Three-phase PFC boost converters, high-voltage DC-DC converter primary side (e.g., in isolated battery charger), and full-bridge/half-bridge inverter output stages. Scenario 2: Battery Interface & Isolated DC-DC Converter Stage (150V-200V Class) – Medium-Voltage High-Current Device Recommended Model: VBGL11515 (Single-N, 150V, 70A, TO-263) Key Parameter Advantages: Utilizes SGT (Shielded Gate Trench) technology, achieving an exceptionally low Rds(on) of 13.5mΩ at 10V drive. High continuous current rating of 70A handles high battery discharge/charge currents efficiently. Scenario Adaptation Value: The low Rds(on) minimizes conduction losses in high-current paths like battery contactors or synchronous rectification in low-voltage, high-current DC-DC converters. The TO-263 (D2PAK) package offers a good balance between power handling and footprint, suitable for high-density modular designs. Applicable Scenarios: Battery string connection and management switches, synchronous rectification in 48V to 12V/5V isolated DC-DC converters, and high-current bus switching. Scenario 3: Auxiliary Power Supply & Control Signal Switching (30V Class) – Low-Voltage High-Efficiency Device Recommended Model: VBQF3316G (Half-Bridge N+N, 30V, 28A, DFN8(3x3)) Key Parameter Advantages: Integrated half-bridge configuration in a compact DFN package. Low Rds(on) of 16mΩ (high-side) / 40mΩ (low-side) @ 10V Vgs. 30V rating is ideal for 12V/24V auxiliary rails. Scenario Adaptation Value: The integrated half-bridge simplifies layout for synchronous buck or boost converters generating control board voltages (e.g., 12V, 5V, 3.3V). The ultra-compact DFN package saves board space for control logic and monitoring circuits. High switching frequency capability improves auxiliary power supply density and efficiency. Applicable Scenarios: Point-of-load (POL) DC-DC converters for control logic, fan drive circuits, communication module power switches, and general-purpose low-voltage synchronous switching. III. System-Level Design Implementation Points Drive Circuit Design VBP185R07: Requires a dedicated high-side gate driver with sufficient drive current and negative bias capability for reliable turn-off in bridge configurations. Attention to isolation and dv/dt immunity is critical. VBGL11515: Pair with a medium-voltage gate driver IC. Optimize gate loop inductance to prevent oscillations. Use Miller clamp techniques if necessary. VBQF3316G: Can be driven by a half-bridge driver IC. Ensure proper dead-time insertion to prevent shoot-through. Thermal Management Design Graded Strategy: VBP185R07 necessitates a dedicated heatsink. VBGL11515 requires a substantial PCB copper pour or a small heatsink depending on current. VBQF3316G relies on PCB thermal vias and copper for heat dissipation. Derating: Operate devices at 70-80% of their rated current in continuous conduction. Ensure junction temperature remains below 125°C under worst-case ambient conditions (e.g., 50°C). EMC and Reliability Assurance Snubber Circuits: Use RC snubbers across MOSFETs in high-voltage stages (VBP185R07) to dampen ringing and reduce EMI. Protection: Implement desaturation detection for high-voltage switches. Use TVS diodes on gate pins and varistors/MOVs at input/output terminals for surge protection. Integrate current sensing for overload and short-circuit protection in all high-current paths (using VBGL11515). Paralleling: For higher currents, parallel multiple VBGL11515 devices with careful attention to current sharing via gate resistors and symmetric layout. IV. Core Value of the Solution and Optimization Suggestions The power MOSFET selection solution for modular UPS systems, based on scenario-driven logic, provides comprehensive coverage from high-voltage AC processing to low-voltage auxiliary power. Its core value is reflected in three key aspects: Maximized System Efficiency across Power Chain: By selecting optimized devices for each stage—low switching loss planar MOSFETs for high-voltage, ultra-low Rds(on) SGT MOSFETs for high-current, and integrated half-bridge for auxiliary power—losses are minimized at every conversion point. This contributes to achieving peak system efficiency >96% and reducing overall energy loss, critical for 24/7 data center operation. Enhanced Power Density and Serviceability: The use of compact packages (DFN for control, TO-263 for medium power) and efficient devices reduces the footprint of power stages. This supports the modular and hot-swappable design philosophy of modern UPS, allowing for higher power density per rack unit and easier field maintenance and module replacement. Optimal Balance of High Reliability and Total Cost of Ownership (TCO): The selected devices offer proven technology (Planar, SGT) with sufficient voltage/current margins and ruggedness for demanding UPS environments. This robustness, combined with effective thermal and protection design, maximizes uptime and extends service life. While not the absolute latest technology (e.g., SiC), this selection provides an excellent balance of performance, reliability, and cost, optimizing the TCO for UPS manufacturers and end-users. In the design of modular UPS power systems, strategic MOSFET selection is fundamental to achieving high efficiency, high density, and ultimate reliability. This scenario-based solution, by aligning device characteristics with stage-specific requirements and emphasizing system-level design for drive, thermal, and protection, offers a actionable technical roadmap. As UPS systems evolve towards wider input ranges, higher efficiency targets, and increased intelligence, future exploration should focus on the integration of Silicon Carbide (SiC) MOSFETs for the high-voltage stages to push efficiency and frequency further, and the adoption of intelligent power modules with integrated sensing and control, laying the hardware foundation for the next generation of ultra-efficient, smart, and modular UPS systems.
Detailed Topology Diagrams
High-Voltage PFC & Inverter Stage Topology Detail
graph LR
subgraph "Three-Phase PFC Boost Converter"
A[Three-Phase 380VAC] --> B[EMI/Input Filter]
B --> C[Three-Phase Rectifier]
C --> D[PFC Inductor]
D --> E[PFC Switching Node]
subgraph "High-Voltage MOSFETs (Scenario 1)"
Q1["VBP185R07 850V/7A"]
Q2["VBP185R07 850V/7A"]
end
E --> Q1
E --> Q2
Q1 --> F[High-Voltage DC Bus]
Q2 --> G[Primary Ground]
H[PFC Controller] --> I[High-Side Driver with Isolation]
I --> Q1
I --> Q2
end
subgraph "Full-Bridge Inverter Stage"
F --> J[DC Link Capacitors]
J --> K[Inverter Bridge]
subgraph "Inverter MOSFET Array"
Q3["VBP185R07 850V/7A"]
Q4["VBP185R07 850V/7A"]
Q5["VBP185R07 850V/7A"]
Q6["VBP185R07 850V/7A"]
end
K --> Q3
K --> Q4
K --> Q5
K --> Q6
Q3 --> L[Output Filter]
Q4 --> M[Inverter Ground]
Q5 --> L
Q6 --> M
L --> N[AC Output]
O[Inverter Controller] --> P[Gate Driver Array]
P --> Q3
P --> Q4
P --> Q5
P --> Q6
end
subgraph "Protection Circuits"
RCD1[RCD Snubber] --> Q1
RCD2[RCD Snubber] --> Q3
DESAT1[Desat Detection] --> Q1
DESAT2[Desat Detection] --> Q3
TVS1[TVS Array] --> I
TVS2[TVS Array] --> P
end
style Q1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px
style Q3 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px
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