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Optimization of Power Chain for Airport Charging Pile Clusters: A Precise MOSFET/IGBT Selection Scheme Based on High-Power AC-DC, Auxiliary Power, and Intelligent Distribution
Airport Charging Pile Power Chain Optimization Topology Diagram

Airport Charging Pile Power Chain Overall Topology Diagram

graph LR %% Main Power Conversion Path subgraph "High-Power AC-DC Conversion (Main Power Path)" AC_IN["Three-Phase 400-480VAC
Airport Grid Input"] --> INPUT_FILTER["EMI/Input Filter"] INPUT_FILTER --> RECTIFIER["Three-Phase Rectifier"] RECTIFIER --> PFC_INDUCTOR["PFC Boost Inductor"] PFC_INDUCTOR --> PFC_SWITCH["PFC Switching Node"] subgraph "High-Power PFC Stage (IGBT-Based)" PFC_IGBT["VBP16I75
650V/75A IGBT+FRD"] end PFC_SWITCH --> PFC_IGBT PFC_IGBT --> HV_BUS["High-Voltage DC Bus
600-800VDC"] HV_BUS --> DC_DC_PRIMARY["Isolated DC-DC Primary"] DC_DC_PRIMARY --> DC_DC_SWITCH["DC-DC Switching Node"] DC_DC_SWITCH --> DC_DC_IGBT["VBP16I75
650V/75A IGBT+FRD"] DC_DC_IGBT --> GND_PRIMARY HV_BUS --> OUTPUT_FILTER["Output Filter"] OUTPUT_FILTER --> CHARGING_OUTPUT["DC Charging Output
200-1000VDC"] end %% Auxiliary Power Supply subgraph "Auxiliary Power Supply (AUX)" HV_BUS --> AUX_INPUT["AUX Input"] subgraph "Flyback Converter Primary" AUX_SWITCH["VBE17R08S
700V/8A MOSFET"] end AUX_INPUT --> FLYBACK_TRANS["Flyback Transformer
Primary"] FLYBACK_TRANS --> AUX_SWITCH AUX_SWITCH --> AUX_GND FLYBACK_TRANS_SEC["Flyback Transformer
Secondary"] --> AUX_RECT["Rectifier & Filter"] AUX_RECT --> LOW_VOLTAGE_RAILS["Low-Voltage Rails
12V/24V/5V"] end %% Intelligent Power Distribution subgraph "Intelligent Power Distribution & Load Management" LOW_VOLTAGE_RAILS --> DISTRIBUTION_BUS["Distribution Bus"] subgraph "Multi-Channel Load Switches" SW_CH1["VBC6N2014
Channel 1"] SW_CH2["VBC6N2014
Channel 2"] SW_CH3["VBC6N2014
Channel 3"] SW_CH4["VBC6N2014
Channel 4"] end DISTRIBUTION_BUS --> SW_CH1 DISTRIBUTION_BUS --> SW_CH2 DISTRIBUTION_BUS --> SW_CH3 DISTRIBUTION_BUS --> SW_CH4 SW_CH1 --> LOAD1["USB Charging Ports"] SW_CH2 --> LOAD2["Communication Modules"] SW_CH3 --> LOAD3["Cooling Fans"] SW_CH4 --> LOAD4["HMI Display"] end %% Control & Monitoring System subgraph "Central Control & Monitoring" MAIN_MCU["Main Control MCU"] --> PFC_CONTROLLER["PFC Controller"] MAIN_MCU --> DC_DC_CONTROLLER["DC-DC Controller"] MAIN_MCU --> AUX_CONTROLLER["AUX Controller"] PFC_CONTROLLER --> PFC_DRIVER["PFC Gate Driver"] DC_DC_CONTROLLER --> DC_DC_DRIVER["DC-DC Gate Driver"] AUX_CONTROLLER --> AUX_DRIVER["AUX Gate Driver"] PFC_DRIVER --> PFC_IGBT DC_DC_DRIVER --> DC_DC_IGBT AUX_DRIVER --> AUX_SWITCH MAIN_MCU --> GPIO_EXPANDER["GPIO Expander"] GPIO_EXPANDER --> SW_CH1 GPIO_EXPANDER --> SW_CH2 GPIO_EXPANDER --> SW_CH3 GPIO_EXPANDER --> SW_CH4 end %% Protection & Sensing subgraph "Protection & Sensing Network" VOLTAGE_SENSE["Voltage Sensing"] --> MAIN_MCU CURRENT_SENSE["Current Sensing"] --> MAIN_MCU TEMP_SENSE["Temperature Sensors"] --> MAIN_MCU subgraph "Protection Circuits" SNUBBER_PFC["RCD Snubber
(PFC Stage)"] SNUBBER_DC_DC["RC Snubber
(DC-DC Stage)"] TVS_ARRAY["TVS Array
(Gate Protection)"] end SNUBBER_PFC --> PFC_IGBT SNUBBER_DC_DC --> DC_DC_IGBT TVS_ARRAY --> PFC_DRIVER TVS_ARRAY --> DC_DC_DRIVER end %% Thermal Management subgraph "Three-Level Thermal Management" LEVEL1["Level 1: Forced Air/Liquid Cooling"] --> PFC_IGBT LEVEL1 --> DC_DC_IGBT LEVEL2["Level 2: Forced Air Cooling"] --> AUX_SWITCH LEVEL3["Level 3: PCB Thermal Vias"] --> SW_CH1 LEVEL3 --> SW_CH2 COOLING_CONTROLLER["Cooling Controller"] --> FAN_DRIVER["Fan Driver"] COOLING_CONTROLLER --> PUMP_CONTROLLER["Pump Controller"] MAIN_MCU --> COOLING_CONTROLLER end %% Communication Interfaces MAIN_MCU --> CAN_BUS["CAN Bus
(Vehicle Communication)"] MAIN_MCU --> ETHERNET["Ethernet
(Cloud/Network)"] MAIN_MCU --> RS485["RS-485
(Cluster Management)"] %% Style Definitions style PFC_IGBT fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style AUX_SWITCH fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style SW_CH1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style MAIN_MCU fill:#fce4ec,stroke:#e91e63,stroke-width:2px

Preface: Building the "Power Hub" for Airport Ground Support Electrification – Discussing the Systems Thinking Behind Power Device Selection
In the accelerating electrification of airport ground support equipment, a high-performance charging pile cluster is far more than a simple aggregation of connectors and cables. It functions as a robust, efficient, and intelligent electrical energy "gateway." Its core performance—high conversion efficiency, stable output under fluctuating grid conditions, reliable 24/7 operation, and smart management of multiple outputs—is fundamentally rooted in the power conversion and management core. This article adopts a systematic, co-design approach to address the core challenge within the power chain of airport charging piles: how to select the optimal combination of power MOSFETs and IGBTs for the three critical nodes—high-power AC-DC conversion, low-voltage auxiliary power supply, and multi-channel intelligent power distribution—under the multi-faceted constraints of high power density, extreme reliability, wide temperature operation, and stringent cost control.
Within an airport charging pile system, the power conversion module is the decisive factor for efficiency, power quality, reliability, and thermal performance. Based on comprehensive considerations of high-voltage handling, efficient power conversion, system intelligence, and thermal management, this article selects three key devices from the component library to construct a hierarchical, complementary power solution.
I. In-Depth Analysis of the Selected Device Combination and Application Roles
1. The High-Power Conversion Backbone: VBP16I75 (650V IGBT+FRD, 75A, TO-247) – PFC / High-Power Isolated DC-DC Primary Side Switch
Core Positioning & Topology Deep Dive: Ideally suited for the critical high-power stage in charging piles, such as the Boost PFC circuit or the primary-side switch of a high-power LLC resonant converter. Its high-current (75A) and medium-voltage (650V) rating, combined with the integrated Fast Recovery Diode (FRD), make it a robust choice for hard-switching or soft-switching topologies handling tens of kilowatts. The 650V rating provides safe margin for universal three-phase AC input (up to 480V AC).
Key Technical Parameter Analysis:
Low Conduction Loss: A typical VCEsat of 1.5V @15V ensures low conduction loss at high currents, directly impacting the efficiency of the high-power stage.
Integrated FRD for Reliability: The built-in FRD provides an optimized path for inductive energy, crucial in PFC or flyback/forward topologies, enhancing reliability and simplifying layout by eliminating external diode selection and associated parasitics.
Selection Trade-off: Compared to multiple paralleled lower-current MOSFETs (complex current sharing, higher gate drive complexity) or standard IGBTs, this high-current integrated IGBT+FRD in a TO-247 package offers an excellent balance of current-handling capability, robustness, and cost-effectiveness for the core power conversion stage.
2. The High-Voltage Auxiliary Power Workhorse: VBE17R08S (700V, 8A, TO-252) – Auxiliary Power Supply (AUX) Flyback / Fly-Buck Primary Switch
Core Positioning & System Benefit: Dedicated to the high-voltage input side of the auxiliary power supply that generates low-voltage rails (e.g., 12V/24V) for internal control, communication, and cooling systems. Its 700V drain-source voltage rating offers superior margin and robustness against line surges and ringing in flyback topologies, a common choice for AUX supplies.
Enhanced System Reliability: The high voltage rating ensures long-term reliability even under harsh grid transients common in industrial environments like airports.
Super-Junction (SJ) Technology: The Multi-EPI SJ technology offers a favorable trade-off between Rds(on) and switching performance at high voltages, contributing to good efficiency in the auxiliary power stage.
Compact Power Density: The TO-252 package allows for a compact footprint while providing sufficient thermal dissipation for the typically medium-power AUX supply.
3. The Intelligent Low-Voltage Distribution Manager: VBC6N2014 (Dual 20V N-Channel, 7.6A per channel, TSSOP8) – Multi-Channel Output Control & Intelligent Load Management
Core Positioning & System Integration Advantage: This dual common-drain N-channel MOSFET in a compact TSSOP8 package is the key enabler for intelligent, space-constrained management of multiple low-voltage output channels within the charging pile.
Application Example: Used for hot-swap control, individual output enable/disable, or current limiting for USB ports, communication module power, fan control, and LED indicators. Allows for sequential power-up/down and fault isolation.
Ultra-Low Rds(on) Value: An exceptionally low Rds(on) of 14mΩ @4.5V minimizes voltage drop and conduction loss on power distribution paths, critical for maintaining voltage regulation.
High-Side Configuration Simplicity: The common-drain configuration simplifies its use in high-side switching applications when combined with a suitable charge pump or bootstrap driver IC, enabling direct control from low-voltage microcontrollers for intelligent power management.
II. System Integration Design and Expanded Key Considerations
1. Topology, Drive, and Control Loop Synergy
High-Power Stage Control: The drive for VBP16I75 must be robust, with sufficient current capability to manage its larger gate charge, and synchronized with the PFC or DC-DC controller to ensure high power factor and efficiency.
Auxiliary Supply Reliability: The drive for VBE17R08S should be optimized for the flyback topology, potentially incorporating primary-side regulation (PSR) for simplicity and cost savings. Its switching behavior impacts EMI and cross-regulation.
Digital Power Management: The VBC6N2014 gates are controlled via GPIOs or PWM from the main system microcontroller, enabling software-defined load sequencing, soft-start, and real-time overcurrent protection cut-off.
2. Hierarchical Thermal Management Strategy
Primary Heat Source (Forced Air/Liquid Cooling): VBP16I75, handling the main power throughput, must be mounted on a substantial heatsink, often integrated with the main cooling system (fans or liquid cold plate) of the charging pile cabinet.
Secondary Heat Source (Passive/Forced Air): VBE17R08S in the auxiliary power module requires a dedicated small heatsink or relies on airflow from the system fan, considering its lower but continuous power dissipation.
Tertiary Heat Source (PCB Conduction): The VBC6N2014, due to its ultra-low Rds(on) and typically intermittent operation, primarily dissipates heat through the PCB copper pours and vias to the board's ground plane or chassis.
3. Engineering Details for Reliability Reinforcement
Electrical Stress Protection:
VBP16I75/VBE17R08S: Snubber circuits (RCD or RC) are essential to clamp voltage spikes caused by transformer leakage inductance during turn-off, especially in flyback or hard-switched topologies.
Inductive Load Management: For loads switched by VBC6N2014 (e.g., fans, solenoids), freewheeling diodes or TVS arrays must be placed close to the load to absorb turn-off energy.
Enhanced Gate Protection: All gate drives should be low-inductance. Series gate resistors should be optimized. Parallel Zener diodes (e.g., ±15V for logic-level devices) between gate and source are critical for ESD and overvoltage protection. Pull-down resistors ensure off-state stability.
Derating Practice:
Voltage Derating: VCE stress on VBP16I75 should be below 80% of 650V (520V). VDS stress on VBE17R08S should have ample margin above the rectified highest AC line voltage.
Current & Thermal Derating: Continuous and pulse current capabilities must be derated based on the actual operating junction temperature (Tj < 125°C recommended), using transient thermal impedance curves, to ensure reliability during peak loads or high ambient temperatures.
III. Quantifiable Perspective on Scheme Advantages and Competitor Comparison
Quantifiable Efficiency Gain: Using VBP16I75 with its low VCEsat in a 30kW PFC stage, compared to standard IGBTs, can reduce conduction losses significantly, directly improving overall charging efficiency and reducing thermal burden.
Quantifiable Power Density & Reliability Improvement: Integrating dual low-Rds(on) switches (VBC6N2014) for load management saves >60% PCB area versus discrete solutions, reduces component count, and improves the Mean Time Between Failures (MTBF) of the control board.
Lifecycle Cost Optimization: The selected devices, matched to their specific roles with robust protection, minimize field failures and maintenance downtime, crucial for the 24/7 operational demands of airport infrastructure, leading to lower total cost of ownership.
IV. Summary and Forward Look
This scheme presents a holistic, optimized power chain for airport charging pile clusters, addressing high-power AC-DC conversion, reliable auxiliary power generation, and intelligent low-voltage power distribution. Its essence is "right-sizing for the application, optimizing the system":
Main Power Conversion Level – Focus on "Robustness & Current Handling": Select high-current, integrated IGBT+FRD solutions for the core high-power path where reliability and conduction loss are paramount.
Auxiliary Power Level – Focus on "High-Voltage Reliability": Choose switches with voltage ratings well above the input to ensure unwavering operation under all grid conditions.
Power Distribution Level – Focus on "Intelligent Integration & Density": Employ highly integrated, ultra-low Rds(on) multi-channel switches to enable complex, compact, and smart load management.
Future Evolution Directions:
Wide Bandgap Adoption: For next-generation ultra-high efficiency and power density piles, the PFC stage could migrate to Silicon Carbide (SiC) MOSFETs, and the AUX supply to Gallium Nitride (GaN) HEMTs, enabling higher frequencies and smaller magnetics.
Fully Integrated Smart Power Stages: Consider Intelligent Power Modules (IPMs) or integrated driver-plus-MOSFET solutions that embed protection, diagnostics, and communication, further simplifying design and enhancing system monitoring and prognostic capabilities.
Engineers can refine this framework based on specific charging pile parameters such as output power level (e.g., 22kW, 150kW), input voltage range, required auxiliary outputs, and environmental specifications (e.g., IP rating, operating temperature), to design high-performance, robust, and reliable charging infrastructure for airport electrification.

Detailed Topology Diagrams

High-Power PFC/DC-DC Stage Topology Detail

graph LR subgraph "Three-Phase PFC Boost Converter" A[Three-Phase AC Input] --> B[EMI Filter] B --> C[Three-Phase Rectifier] C --> D[DC Bus Capacitor] D --> E[PFC Inductor] E --> F[PFC Switch Node] F --> G["VBP16I75
IGBT+FRD"] G --> H[High-Voltage DC Bus] I[PFC Controller] --> J[Gate Driver] J --> G K[Current Sensor] --> I L[Voltage Sensor] --> I end subgraph "Isolated DC-DC Converter" H --> M[DC-DC Input Capacitor] M --> N[Transformer Primary] N --> O[DC-DC Switch Node] O --> P["VBP16I75
IGBT+FRD"] P --> Q[Primary Ground] R[DC-DC Controller] --> S[Gate Driver] S --> P T[Resonant Components] --> N U[Current Sense] --> R end subgraph "Protection & Snubber" V["RCD Snubber"] --> G W["RC Snubber"] --> P X["TVS Protection"] --> J X --> S end style G fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style P fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

Auxiliary Power Supply Topology Detail

graph LR subgraph "Flyback Converter Primary Side" A[High-Voltage DC Bus] --> B[Input Capacitor] B --> C[Flyback Transformer Primary] C --> D[Primary Switch Node] D --> E["VBE17R08S
700V MOSFET"] E --> F[Primary Ground] G[Flyback Controller] --> H[Gate Driver] H --> E I[Current Sensing] --> G J[Voltage Feedback] --> G end subgraph "Flyback Converter Secondary Side" K[Flyback Transformer Secondary] --> L[Output Rectifier] L --> M[Output Filter] M --> N[12V Output] K --> O[Auxiliary Winding] O --> P[Rectifier & Filter] P --> Q[24V Output] M --> R[Voltage Regulator] R --> S[5V Output] end subgraph "Protection Circuits" T["RCD Clamp"] --> E U["TVS Protection"] --> H V["Overvoltage Protection"] --> G W["Overcurrent Protection"] --> G end subgraph "Load Connections" N --> X[Cooling Fans] Q --> Y[Solenoids/Actuators] S --> Z[Control Logic] end style E fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Intelligent Distribution & Load Management Topology Detail

graph LR subgraph "Multi-Channel Load Switch Configuration" PWR_12V[12V Power Rail] --> CH1_IN[Channel 1 Input] PWR_12V --> CH2_IN[Channel 2 Input] PWR_12V --> CH3_IN[Channel 3 Input] PWR_12V --> CH4_IN[Channel 4 Input] subgraph "VBC6N2014 Dual MOSFET Array" MOS1["VBC6N2014-1
Dual N-Channel"] MOS2["VBC6N2014-2
Dual N-Channel"] end CH1_IN --> MOS1 CH2_IN --> MOS1 CH3_IN --> MOS2 CH4_IN --> MOS2 MOS1 --> CH1_OUT[Channel 1 Output] MOS1 --> CH2_OUT[Channel 2 Output] MOS2 --> CH3_OUT[Channel 3 Output] MOS2 --> CH4_OUT[Channel 4 Output] CH1_OUT --> LOAD1[USB Ports] CH2_OUT --> LOAD2[Comm Module] CH3_OUT --> LOAD3[Display] CH4_OUT --> LOAD4[Sensors] end subgraph "Control & Drive Circuitry" MCU[Main MCU] --> GPIO[GPIO Ports] GPIO --> LEVEL_SHIFTER[Level Shifter] LEVEL_SHIFTER --> GATE_DRIVER[Gate Driver] GATE_DRIVER --> MOS1 GATE_DRIVER --> MOS2 end subgraph "Current Sensing & Protection" SENSE_RESISTOR[Current Sense Resistor] --> CURRENT_AMP[Current Amplifier] CURRENT_AMP --> COMPARATOR[Comparator] COMPARATOR --> FAULT_LOGIC[Fault Logic] FAULT_LOGIC --> MCU FAULT_LOGIC --> GATE_DRIVER TVS_LOAD[TVS Diodes] --> LOAD1 TVS_LOAD --> LOAD2 FREE_WHEEL[Freewheeling Diodes] --> LOAD3 FREE_WHEEL --> LOAD4 end style MOS1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style MOS2 fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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