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Intelligent Power MOSFET Selection Solution for Industrial Power Supplies – Design Guide for High-Efficiency, High-Reliability, and High-Power-Density Systems
Industrial Power Supply MOSFET System Topology Diagram

Industrial Power Supply MOSFET System Overall Topology Diagram

graph LR %% Input Section subgraph "Input Stage & Three-Phase Rectification" AC_IN["Three-Phase AC Input
380-480VAC"] --> EMI_FILTER["Industrial-Grade EMI Filter"] EMI_FILTER --> THREE_PHASE_RECT["Three-Phase Rectifier Bridge"] THREE_PHASE_RECT --> HV_DC_BUS["High-Voltage DC Bus
600V-800VDC"] end %% Primary Side Power Conversion subgraph "Primary Side Power Conversion (600-1200V Class)" HV_DC_BUS --> PFC_STAGE["PFC Boost Stage"] subgraph "SiC MOSFET Array for Primary Switching" Q_PFC1["VBP112MC100
1200V/100A SiC"] Q_LLC1["VBP112MC100
1200V/100A SiC"] Q_PFC2["VBP112MC100
1200V/100A SiC"] Q_LLC2["VBP112MC100
1200V/100A SiC"] end PFC_STAGE --> Q_PFC1 PFC_STAGE --> Q_PFC2 Q_PFC1 --> PFC_OUT["PFC Output Capacitor Bank"] Q_PFC2 --> PFC_OUT PFC_OUT --> LLC_RESONANT["LLC Resonant Tank"] LLC_RESONANT --> HF_TRANSFORMER["High-Frequency Transformer"] HF_TRANSFORMER --> Q_LLC1 HF_TRANSFORMER --> Q_LLC2 Q_LLC1 --> PRIMARY_GND Q_LLC2 --> PRIMARY_GND end %% Secondary Side & Output Stage subgraph "Secondary Side Synchronous Rectification (≤150V Class)" HF_TRANSFORMER_SEC["Transformer Secondary"] --> SR_BRIDGE["Synchronous Rectification Bridge"] subgraph "High-Current SGT MOSFET Array" Q_SR1["VBGM1806
80V/120A SGT"] Q_SR2["VBGM1806
80V/120A SGT"] Q_SR3["VBGM1806
80V/120A SGT"] Q_SR4["VBGM1806
80V/120A SGT"] end SR_BRIDGE --> Q_SR1 SR_BRIDGE --> Q_SR2 SR_BRIDGE --> Q_SR3 SR_BRIDGE --> Q_SR4 Q_SR1 --> OUTPUT_FILTER["Output LC Filter"] Q_SR2 --> OUTPUT_FILTER Q_SR3 --> OUTPUT_FILTER Q_SR4 --> OUTPUT_FILTER OUTPUT_FILTER --> MAIN_OUT["Main DC Output
12V/24V/48V"] MAIN_OUT --> INDUSTRIAL_LOAD["Industrial Equipment Load"] end %% Auxiliary Power & Control subgraph "Auxiliary Power & Intelligent Control" AUX_POWER["Auxiliary Power Supply
12V/5V/3.3V"] --> CONTROL_MCU["Control MCU/DSP"] subgraph "Intelligent Load Switching (P-MOS Array)" SW_FAN["VBL2303
-30V/-100A P-MOS"] SW_RELAY["VBL2303
-30V/-100A P-MOS"] SW_COMM["VBL2303
-30V/-100A P-MOS"] SW_BACKUP["VBL2303
-30V/-100A P-MOS"] end CONTROL_MCU --> SW_FAN CONTROL_MCU --> SW_RELAY CONTROL_MCU --> SW_COMM CONTROL_MCU --> SW_BACKUP SW_FAN --> COOLING_SYSTEM["Cooling System"] SW_RELAY --> CONTACTORS["Industrial Contactors"] SW_COMM --> COMM_MODULE["Communication Interface"] SW_BACKUP --> REDUNDANT_SYS["Redundant Backup System"] end %% Driving & Protection Circuits subgraph "Optimized Drive & Protection Circuits" subgraph "SiC Gate Drivers" DRIVER_SIC1["Dedicated SiC Gate Driver
with Negative Turn-off"] DRIVER_SIC2["Dedicated SiC Gate Driver
with Negative Turn-off"] end subgraph "SGT MOSFET Drivers" DRIVER_SGT1["High-Current Gate Driver
≥2A Peak"] DRIVER_SGT2["High-Current Gate Driver
≥2A Peak"] end subgraph "Protection Circuits" SNUBBER_RC["RC Snubber Network"] TVS_ARRAY["TVS ESD Protection"] DESAT_DETECT["Desaturation Detection"] OVERVOLTAGE["Overvoltage Protection"] OVERTEMP["Overtemperature Protection"] end DRIVER_SIC1 --> Q_PFC1 DRIVER_SIC2 --> Q_LLC1 DRIVER_SGT1 --> Q_SR1 DRIVER_SGT2 --> Q_SR2 SNUBBER_RC --> Q_PFC1 TVS_ARRAY --> DRIVER_SIC1 DESAT_DETECT --> CONTROL_MCU OVERVOLTAGE --> CONTROL_MCU OVERTEMP --> CONTROL_MCU end %% Thermal Management subgraph "Tiered Thermal Management System" COOLING_LEVEL1["Level 1: Active Cooling
SiC & SGT MOSFETs with Heatsinks"] COOLING_LEVEL2["Level 2: PCB Thermal Design
Copper Pour & Thermal Vias"] COOLING_LEVEL3["Level 3: System Monitoring
NTC Temperature Sensors"] COOLING_LEVEL1 --> Q_PFC1 COOLING_LEVEL1 --> Q_SR1 COOLING_LEVEL2 --> Q_PFC2 COOLING_LEVEL2 --> Q_SR2 COOLING_LEVEL3 --> CONTROL_MCU end %% Communication & Monitoring CONTROL_MCU --> CAN_485["CAN/RS-485 Interface"] CONTROL_MCU --> PMBUS["PMBus/I2C Monitoring"] CONTROL_MCU --> FAULT_INDICATOR["Fault Indicator LEDs"] %% Style Definitions style Q_PFC1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_SR1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style SW_FAN fill:#fff3e0,stroke:#ff9800,stroke-width:2px style CONTROL_MCU fill:#fce4ec,stroke:#e91e63,stroke-width:2px

The performance of industrial power supply systems directly determines the stability, efficiency, and operational continuity of downstream equipment. As the core switching component, the selection of the power MOSFET profoundly impacts the power supply's power density, conversion efficiency, thermal performance, and reliability under harsh conditions. Addressing the typical high-voltage input, multi-output, and long-term continuous operation requirements of industrial power supplies, this article proposes a targeted, systematic power MOSFET selection and design implementation plan.
I. Overall Selection Principles: Balancing Voltage, Current, and Technology
The selection must prioritize system-level optimization over individual parameters, achieving a balance among voltage withstand capability, conduction/switching losses, package scalability, and long-term reliability.
Voltage and Current Margin Design: Based on the input bus voltage (e.g., 400V DC, 600V DC from three-phase rectification) and considering voltage spikes and transients, the MOSFET's VDS rating should maintain a margin ≥30-40%. The current rating must be derated based on thermal design, with continuous operating current typically not exceeding 50-70% of the device's rated ID.
Technology-Driven Loss Reduction: For primary-side switches, switching loss is often dominant. Devices with low gate charge (Qg) and low output capacitance (Coss) are preferred. For secondary-side synchronous rectification or low-voltage high-current paths, ultra-low on-resistance (Rds(on)) is critical to minimize conduction loss. The emergence of Wide Bandgap (WBG) technologies like SiC offers superior performance in high-voltage/high-frequency applications.
Package and Thermal Coordination: High-power stages demand packages with excellent thermal performance (e.g., TO-247, TO-263) and low thermal resistance. PCB layout must incorporate sufficient copper area and thermal vias. The package must also exhibit low parasitic inductance for high-speed switching.
Ruggedness and Industrial Grade: Industrial environments demand devices with high avalanche energy rating, strong body diode robustness, and high junction temperature capability (Tj max ≥ 150°C or 175°C), ensuring stable operation across temperature variations and load surges.
II. Scenario-Specific MOSFET Selection Strategies
Industrial power supplies can be segmented into primary-side power conversion, secondary-side rectification/control, and auxiliary power management. Each segment has distinct requirements.
Scenario 1: High-Voltage Primary-Side Switching & PFC Stage (600V-1200V Class)
This stage handles high voltage and significant switching activity, requiring minimal switching loss and high voltage ruggedness.
Recommended Model: VBP112MC100 (N-MOS, 1200V, 100A, TO-247)
Parameter Advantages:
Utilizes advanced SiC (Silicon Carbide) technology, offering exceptionally low Rds(on) of 16 mΩ (@18V) and superior switching characteristics (low Qg, Coss, no reverse recovery charge).
High voltage rating (1200V) provides ample margin for 800V bus applications, enhancing reliability.
Very high current capability (100A) supports high-power designs.
Scenario Value:
Enables significantly higher switching frequencies (>100 kHz) compared to Si MOSFETs, drastically reducing the size of magnetic components (PFC choke, transformer).
Ultra-low switching losses lead to system efficiencies exceeding 98% in PFC and LLC stages, reducing cooling requirements.
Ideal for next-generation high-power-density, high-efficiency server PSUs and industrial rectifiers.
Scenario 2: High-Current Secondary-Side Synchronous Rectification & Output Stage (≤150V Class)
This stage requires ultra-low conduction loss to handle high output currents, directly impacting overall efficiency and thermal design.
Recommended Model: VBGM1806 (N-MOS, 80V, 120A, TO-220)
Parameter Advantages:
Features SGT (Shielded Gate Trench) technology, achieving an extremely low Rds(on) of 5 mΩ (@10V).
High continuous current rating of 120A ensures robust performance in high-current outputs (e.g., 12V/24V @ 40-60A).
TO-220 package offers a good balance of thermal performance and mounting flexibility.
Scenario Value:
Minimizes voltage drop and conduction loss in the output path, maximizing power delivery efficiency.
High current capability supports parallel operation for even higher current demands, simplifying thermal management through current sharing.
Suitable for synchronous buck converters, point-of-load (PoL) converters, and the main switching element in low-voltage, high-current DC-DC stages.
Scenario 3: Auxiliary Power Control & Intelligent Load Switching
This involves control of fans, contactors, or providing isolated power for control boards, requiring compact solutions, logic-level drive, and sometimes high-side switching capability.
Recommended Model: VBL2303 (Single-P, -30V, -100A, TO-263)
Parameter Advantages:
P-Channel MOSFET with remarkably low Rds(on) of 3 mΩ (@10V), minimizing loss in high-side switch configurations.
Very high current rating (-100A) for a P-channel device, suitable for controlling substantial auxiliary loads.
TO-263 (D²PAK) package provides excellent power handling in a surface-mount format.
Scenario Value:
Simplifies high-side load switching (e.g., 12V/24V fan control) without needing a charge pump or gate driver IC, reducing circuit complexity.
Ultra-low Rds(on) eliminates the need for heat sinks in many auxiliary applications, saving space and cost.
Can be used for active OR-ing or hot-swap circuits in redundant power systems.
III. Key Implementation Points for System Design
Drive Circuit Optimization:
SiC MOSFET (VBP112MC100): Requires a dedicated, high-performance gate driver with negative turn-off voltage (e.g., -3 to -5V) to ensure reliable operation and maximize switching speed. Attention to gate loop layout is critical.
High-Current SGT MOSFET (VBGM1806): Use drivers with peak current capability ≥2A to quickly charge/discharge the large gate capacitance, minimizing transition times.
P-MOS (VBL2303): Ensure the gate driver can pull the gate voltage close to the source voltage for full enhancement. A pull-up resistor may be necessary for defined off-state.
Thermal Management Design:
Tiered Strategy: The SiC and SGT MOSFETs (high-power) require dedicated heatsinks attached via thermal interface material. The P-MOS may rely on PCB copper pour heatsinking.
Monitoring: Implement overtemperature protection (OTP) via NTC thermistors on the heatsink or use MOSFETs with integrated temperature sensing.
EMC and Reliability Enhancement:
Snubber Design: Use RC snubbers across primary switches (VBP112MC100) to damp high-frequency ringing and reduce EMI.
Protection: Incorporate TVS diodes on gates for ESD protection. Use varistors and/or gas discharge tubes on AC/DC inputs for surge immunity. Implement desaturation detection for primary switches for short-circuit protection.
IV. Solution Value and Expansion Recommendations
Core Value:
Maximum Power Density & Efficiency: The combination of SiC for high-voltage switching and SGT for low-voltage high-current paths enables compact, cooler-running designs with peak efficiency >96%.
Enhanced System Intelligence & Protection: The use of a high-performance P-MOS facilitates safe, efficient control of auxiliary systems and load sequencing.
Industrial-Grade Robustness: The selected devices, with their high voltage/current ratings and suitable packages, are engineered for 24/7 operation in demanding environments.
Optimization and Adjustment Recommendations:
Voltage Scaling: For primary-side voltages consistently below 400V, consider the VBP15R50 (500V, 50A) as a cost-optimized high-performance Si alternative.
Higher Integration: For multi-output secondary sides, consider using driver ICs with integrated MOSFETs (Power Stages) or multi-channel gate drivers.
Specialized Control: For precise current limiting in hot-swap applications, combine the VBL2303 with a dedicated hot-swap controller IC.

Detailed Topology Diagrams

High-Voltage Primary Side SiC MOSFET Topology (PFC/LLC)

graph LR subgraph "Three-Phase Input & PFC Stage" A["Three-Phase AC Input"] --> B["EMI Filter & Surge Protection"] B --> C["Three-Phase Rectifier"] C --> D["PFC Boost Inductor"] D --> E["PFC Switching Node"] E --> F["VBP112MC100 SiC MOSFET
1200V/100A"] F --> G["High-Voltage DC Bus
600-800V"] H["PFC Controller"] --> I["Dedicated SiC Gate Driver
with -5V Turn-off"] I --> F G -->|Voltage Feedback| H end subgraph "LLC Resonant Conversion Stage" G --> J["LLC Resonant Tank
Lr, Cr, Lm"] J --> K["HF Transformer Primary"] K --> L["LLC Switching Node"] L --> M["VBP112MC100 SiC MOSFET
1200V/100A"] M --> N["Primary Ground"] O["LLC Controller"] --> P["Dedicated SiC Gate Driver
with -5V Turn-off"] P --> M K -->|Current Sensing| O end subgraph "Protection & Snubber Circuits" Q["RC Snubber Network"] --> F Q --> M R["TVS Diode Array"] --> I R --> P S["Desaturation Detection"] --> O end style F fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style M fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

High-Current Secondary Side SGT MOSFET Topology (Synchronous Rectification)

graph LR subgraph "Synchronous Rectification Bridge" A["Transformer Secondary Winding"] --> B["Center-Tapped Node"] B --> C["VBGM1806 SGT MOSFET
80V/120A
Rds(on)=5mΩ"] C --> D["Output Filter Inductor"] D --> E["Output Capacitor Bank"] E --> F["Main DC Output
12V/24V/48V"] B --> G["VBGM1806 SGT MOSFET
80V/120A
Rds(on)=5mΩ"] G --> H["Output Ground"] I["Synchronous Rectifier Controller"] --> J["High-Current Gate Driver
≥2A Peak"] J --> C J --> G end subgraph "Current Sharing & Parallel Operation" subgraph "Parallel MOSFET Array" K["VBGM1806 x2 Parallel"] L["VBGM1806 x2 Parallel"] end F --> M["Current Sharing Bus"] M --> K M --> L K --> N["Load Terminal"] L --> N O["Current Sense Amplifier"] --> I end subgraph "Thermal Management" P["Heatsink with Thermal Interface"] --> C P --> G Q["PCB Copper Pour"] --> K Q --> L R["NTC Temperature Sensor"] --> I end style C fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style K fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Auxiliary Power Control with P-MOSFET Topology (Intelligent Load Switching)

graph LR subgraph "High-Side Load Switching" A["12V/24V Auxiliary Power"] --> B["VBL2303 P-MOSFET
-30V/-100A
Rds(on)=3mΩ"] B --> C["Industrial Load
(Fan, Contactor, etc.)"] C --> D["Ground"] E["MCU GPIO"] --> F["Level Translator"] F --> G["Gate Driver Circuit"] G --> B H["Current Sense Resistor"] --> I["Current Monitor"] I --> E end subgraph "Hot-Swap & OR-ing Applications" J["Input Power A"] --> K["VBL2303 P-MOSFET
Hot-Swap Switch"] L["Input Power B"] --> M["VBL2303 P-MOSFET
OR-ing Diode"] K --> N["Common Output Bus"] M --> N O["Hot-Swap Controller"] --> K P["OR-ing Controller"] --> M end subgraph "Sequential Power-Up Control" Q["MCU Control Logic"] --> R["Power Sequence Controller"] R --> S["VBL2303 for 12V Rail"] R --> T["VBL2303 for 5V Rail"] R --> U["VBL2303 for 3.3V Rail"] S --> V["12V Loads"] T --> W["5V Loads"] U --> X["3.3V Loads"] end subgraph "Protection Features" Y["TVS for ESD Protection"] --> B Z["Thermal Shutdown"] --> E AA["Undervoltage Lockout"] --> G end style B fill:#fff3e0,stroke:#ff9800,stroke-width:2px style K fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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