Energy Management

Your present location > Home page > Energy Management
Industrial UPS Power MOSFET Selection Solution: Robust and Efficient Power Conversion System Adaptation Guide
Industrial UPS Power MOSFET Selection System Topology Diagram

Industrial UPS Power MOSFET System Overall Topology Diagram

graph LR %% Input Power Stage subgraph "Input Stage: PFC/High-Voltage DC-DC" AC_IN["Three-Phase 380VAC Input"] --> INPUT_FILTER["Input EMI Filter & Rectifier"] INPUT_FILTER --> PFC_BOOST_NODE["PFC Boost Node"] PFC_BOOST_NODE --> Q_PFC["VBMB185R10
850V/10A TO-220F"] Q_PFC --> HV_BUS["High-Voltage DC Bus
400-800VDC"] HV_BUS --> DC_DC_PRIMARY["High-Voltage DC-DC Converter Primary"] DC_DC_PRIMARY --> Q_HVDC["VBMB185R10
850V/10A TO-220F"] Q_HVDC --> HVDC_GND["Primary Ground"] end %% Main Inverter Stage subgraph "Power Core: Main DC-AC Inverter" HV_BUS --> INVERTER_BRIDGE["Inverter Bridge Input"] subgraph "Three-Phase Inverter Legs" LEG_U["Phase U Leg"] --> Q_U_H["VBMB17R18S
700V/18A TO-220F"] LEG_U --> Q_U_L["VBMB17R18S
700V/18A TO-220F"] LEG_V["Phase V Leg"] --> Q_V_H["VBMB17R18S
700V/18A TO-220F"] LEG_V --> Q_V_L["VBMB17R18S
700V/18A TO-220F"] LEG_W["Phase W Leg"] --> Q_W_H["VBMB17R18S
700V/18A TO-220F"] LEG_W --> Q_W_L["VBMB17R18S
700V/18A TO-220F"] end Q_U_H --> AC_OUT_U["Phase U Output"] Q_U_L --> INVERTER_GND["Inverter Ground"] Q_V_H --> AC_OUT_V["Phase V Output"] Q_V_L --> INVERTER_GND Q_W_H --> AC_OUT_W["Phase W Output"] Q_W_L --> INVERTER_GND AC_OUT_U --> OUTPUT_FILTER["Output LC Filter"] AC_OUT_V --> OUTPUT_FILTER AC_OUT_W --> OUTPUT_FILTER OUTPUT_FILTER --> UPS_OUTPUT["UPS Output
380VAC to Load"] end %% Auxiliary & Battery Management subgraph "Support System: Auxiliary Power & Battery Management" BATTERY_BANK["Battery Bank
48VDC"] --> BATTERY_SWITCH_NODE["Battery Switch Node"] BATTERY_SWITCH_NODE --> Q_BAT["VBGQA1802
80V/180A DFN8(5x6)"] Q_BAT --> DC_DC_INPUT["DC-DC Converter Input"] DC_DC_INPUT --> AUX_CONVERTER["Auxiliary DC-DC Converter"] AUX_CONVERTER --> Q_AUX_SW["VBGQA1802
80V/180A DFN8(5x6)"] Q_AUX_SW --> AUX_OUTPUTS["Auxiliary Power Rails
12V/5V/3.3V"] AUX_OUTPUTS --> CONTROL_SYSTEM["Control System & Monitoring"] end %% Control & Protection subgraph "Control & Protection System" CONTROL_SYSTEM --> GATE_DRIVERS["Gate Driver Circuits"] GATE_DRIVERS --> Q_PFC GATE_DRIVERS --> Q_HVDC GATE_DRIVERS --> Q_U_H GATE_DRIVERS --> Q_U_L GATE_DRIVERS --> Q_V_H GATE_DRIVERS --> Q_V_L GATE_DRIVERS --> Q_W_H GATE_DRIVERS --> Q_W_L GATE_DRIVERS --> Q_BAT GATE_DRIVERS --> Q_AUX_SW subgraph "Protection Circuits" OVERCURRENT["Overcurrent Protection"] OVERVOLTAGE["Overvoltage Protection"] OVERTEMP["Overtemperature Protection"] SNUBBER["Snubber Circuits"] TVS_PROTECTION["TVS Protection Diodes"] end OVERCURRENT --> CONTROL_SYSTEM OVERVOLTAGE --> CONTROL_SYSTEM OVERTEMP --> CONTROL_SYSTEM SNUBBER --> Q_PFC SNUBBER --> Q_U_H TVS_PROTECTION --> GATE_DRIVERS end %% Thermal Management subgraph "Hierarchical Thermal Management" HEATSINK_TO220["TO-220F Heatsink Assembly"] --> Q_PFC HEATSINK_TO220 --> Q_U_H HEATSINK_TO220 --> Q_V_H HEATSINK_TO220 --> Q_W_H PCB_COOLING["PCB Copper Pour Cooling"] --> Q_BAT PCB_COOLING --> Q_AUX_SW FORCED_AIR["Forced Air Cooling System"] --> HEATSINK_TO220 TEMP_SENSORS["Temperature Sensors"] --> CONTROL_SYSTEM CONTROL_SYSTEM --> FAN_CONTROL["Fan Speed Control"] FAN_CONTROL --> FORCED_AIR end %% Communication & Monitoring CONTROL_SYSTEM --> COMMUNICATION["Communication Interfaces"] COMMUNICATION --> MODBUS["ModBus/RS485"] COMMUNICATION --> ETHERNET["Ethernet"] COMMUNICATION --> HMI["Human-Machine Interface"] %% Style Definitions style Q_PFC fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_U_H fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_BAT fill:#fff3e0,stroke:#ff9800,stroke-width:2px style CONTROL_SYSTEM fill:#fce4ec,stroke:#e91e63,stroke-width:2px

With the continuous advancement of industrial automation and the critical need for power continuity, Industrial Uninterruptible Power Supplies (UPS) have become the cornerstone for safeguarding sensitive loads. Their power conversion stages—including PFC, inverter, and DC-DC circuits—serving as the "muscle and sinews" of the entire system, require robust, efficient, and highly reliable switching components. The selection of power MOSFETs directly determines the system's conversion efficiency, power density, thermal performance, and mean time between failures (MTBF). Addressing the stringent demands of industrial UPS for high efficiency, ruggedness, scalability, and 24/7 operation, this article centers on scenario-based adaptation to reconstruct the power MOSFET selection logic, providing an optimized solution ready for direct implementation.
I. Core Selection Principles and Scenario Adaptation Logic
Core Selection Principles
High Voltage & Sufficient Margin: For common three-phase input and high-voltage DC bus applications (e.g., 400Vdc, 800Vdc), MOSFET voltage ratings must withstand line transients, switching spikes, and provide a safety margin ≥20-30%.
Ultra-Low Loss is Paramount: Prioritize devices with very low on-state resistance (Rds(on)) and good switching figures of merit (FOM) to minimize conduction and switching losses, which is critical for high-power efficiency and thermal management.
Package for Power & Cooling: Select packages like TO-220F, TO-263, or high-performance DFN based on power level, prioritizing packages with excellent thermal impedance for easier heatsinking in constrained, high-ambient environments.
Ruggedness & Long-Term Reliability: Components must endure harsh electrical environments, surge events, and continuous operation. High avalanche energy rating, robust gate oxide, and stable parameters over temperature are essential.
Scenario Adaptation Logic
Based on the core power conversion stages within an industrial UPS, MOSFET applications are divided into three primary scenarios: Input PFC/High-Voltage Stage (Front-End), Main Inverter Bridge (Power Core), and Auxiliary Power & Battery Management (Support & Control). Device parameters and packages are matched accordingly.
II. MOSFET Selection Solutions by Scenario
Scenario 1: Input PFC / High-Voltage DC-DC Stage – Front-End Device
Recommended Model: VBMB185R10 (Single N-MOS, 850V, 10A, TO-220F)
Key Parameter Advantages: Ultra-high 850V drain-source voltage rating comfortably exceeds requirements for 380VAC three-phase input systems after rectification. Planar technology offers proven robustness and stability at high voltages.
Scenario Adaptation Value: The TO-220F (fully isolated) package is ideal for mounting on a common heatsink in multi-device PFC boost or high-voltage DC-DC converter topologies, simplifying thermal design. Its high voltage rating provides critical margin against line surges, enhancing system reliability in unstable grid conditions.
Applicable Scenarios: Boost switches in 5-10kW PFC circuits, primary switches in high-voltage isolated DC-DC converters.
Scenario 2: Main Inverter Bridge – Power Core Device
Recommended Model: VBMB17R18S (Single N-MOS, 700V, 18A, TO-220F)
Key Parameter Advantages: Utilizes advanced Super Junction Multi-EPI technology, achieving an exceptionally low Rds(on) of 260mΩ at 10V for its voltage class. High continuous current rating of 18A supports substantial output power per device.
Scenario Adaptation Value: The low conduction loss directly translates to higher inverter efficiency and reduced heatsink requirements. The TO-220F package facilitates parallel operation for higher power output stages and allows for direct attachment to large heatsinks, enabling efficient heat dissipation crucial for continuous full-load operation.
Applicable Scenarios: Half-bridge or full-bridge switching devices in the main DC-AC inverter stage for 3-10kVA UPS systems.
Scenario 3: Auxiliary Power & Battery Management – Support & Control Device
Recommended Model: VBGQA1802 (Single N-MOS, 80V, 180A, DFN8(5x6))
Key Parameter Advantages: Features state-of-the-art SGT (Shielded Gate Trench) technology, delivering an ultra-low Rds(on) of 1.9mΩ at 10V. Extremely high continuous current rating of 180A.
Scenario Adaptation Value: The extremely low Rds(on) minimizes losses in high-current paths, which is critical for battery charging/discharging circuits and non-isolated DC-DC converters (e.g., 48V to 12V). The compact DFN8 package offers very low parasitic inductance, suitable for high-frequency switching, and its exposed pad provides superior thermal performance for its size, aiding power density in control card designs.
Applicable Scenarios: Main switching or synchronous rectification in high-current, low-voltage DC-DC converters; battery string connection and management switches.
III. System-Level Design Implementation Points
Drive Circuit Design
VBMB185R10 / VBMB17R18S: Require dedicated gate driver ICs with sufficient source/sink current capability. Careful layout to minimize high-voltage loop area and gate loop inductance is critical. Use negative turn-off voltage if necessary for robustness in noisy environments.
VBGQA1802: Requires a strong driver due to potentially high gate charge. Optimize PCB layout to minimize power loop inductance using wide copper pours. A small gate resistor is recommended to control switching speed and mitigate ringing.
Thermal Management Design
Hierarchical Cooling Strategy: VBMB185R10 and VBMB17R18S should be mounted on a dedicated, sized heatsink, possibly with forced air cooling. VBGQA1802 requires a substantial PCB copper pour under its thermal pad, connected to inner layers or a local heatsink if necessary.
Derating Practice: Design for a junction temperature well below the maximum rating (e.g., Tj < 125°C at maximum ambient). Adhere to current derating curves, typically operating below 60-70% of absolute maximum ratings in continuous mode.
EMC and Reliability Assurance
EMI Suppression: Employ snubber circuits across the drains and sources of the high-voltage MOSFETs (VBMB185R10, VBMB17R18S) to dampen voltage overshoot. Use low-ESR bypass capacitors close to the VBGQA1802.
Protection Measures: Implement comprehensive overcurrent, overtemperature, and DC bus overvoltage protection at the system level. Utilize gate clamp TVS diodes and series resistors for all MOSFETs to protect against voltage spikes and enhance noise immunity. Ensure proper creepage and clearance distances for high-voltage stages.
IV. Core Value of the Solution and Optimization Suggestions
The power MOSFET selection solution for industrial UPS proposed in this article, based on scenario adaptation logic, achieves full-chain coverage from the high-voltage front-end to the low-voltage high-current battery interface. Its core value is mainly reflected in the following three aspects:
Full-Power-Chain Efficiency Optimization: By selecting optimized devices for each stage—a high-voltage robust device for PFC, a low-loss SJ MOSFET for the inverter, and an ultra-low Rds(on) SGT device for auxiliary power—losses are minimized across the entire power conversion path. This translates to higher system efficiency (e.g., >96% for critical stages), reduced cooling requirements, and lower total cost of ownership through energy savings.
Balancing Ruggedness and Power Density: The use of robust, heatsink-friendly TO-220F packages in the high-power stages ensures reliable operation under thermal stress. Meanwhile, the compact, high-performance DFN package in the control/power management stage allows for a more integrated and dense layout. This balance achieves both the ruggedness required for industrial environments and a competitive form factor.
Optimal Trade-off between Performance and Cost: The selected devices represent mature, high-volume technologies (SJ, SGT) that offer a superior performance-to-cost ratio compared to emerging wide-bandgap solutions for these specific voltage/current ranges. This allows system designers to meet demanding efficiency and reliability targets while maintaining overall system cost-effectiveness, which is vital for scalable industrial UPS products.
In the design of power conversion systems for industrial UPS, power MOSFET selection is a cornerstone for achieving high efficiency, robustness, and reliability. The scenario-based selection solution proposed in this article, by accurately matching the distinct requirements of different conversion stages and combining it with system-level drive, thermal, and protection design, provides a comprehensive, actionable technical reference for UPS development. As industrial UPS evolve towards higher efficiency, higher power density, and increased connectivity, the selection of power devices will continue to emphasize deep integration with system topology and control. Future exploration could focus on the application of next-generation SJ technologies and the integration of sensing features within power modules, laying a solid hardware foundation for the next generation of intelligent, ultra-efficient, and field-proven industrial UPS systems. In an era demanding uninterrupted operation, superior hardware design is the fundamental guarantee for power continuity and equipment safety.

Detailed Topology Diagrams

Input PFC/High-Voltage DC-DC Stage Topology Detail

graph LR subgraph "Three-Phase PFC Boost Converter" A[Three-Phase 380VAC] --> B[EMI Filter] B --> C[Three-Phase Rectifier] C --> D[DC Bus Capacitor] D --> E[PFC Inductor] E --> F[PFC Switch Node] F --> G["VBMB185R10
850V/10A"] G --> H[High-Voltage DC Bus] I[PFC Controller] --> J[Gate Driver] J --> G H -->|Voltage Feedback| I end subgraph "High-Voltage DC-DC Isolated Converter" H --> K[Transformer Primary] K --> L[LLC Resonant Tank] L --> M[Primary Switch Node] M --> N["VBMB185R10
850V/10A"] N --> O[Primary Ground] P[LLC Controller] --> Q[Gate Driver] Q --> N K -->|Current Sensing| P end subgraph "Thermal Management" R[TO-220F Heatsink] --> G R --> N S[Temperature Sensor] --> T[MCU] T --> U[Fan Control] U --> V[Cooling Fan] end style G fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style N fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

Main Inverter Bridge Topology Detail

graph LR subgraph "Three-Phase Full-Bridge Inverter" HV_BUS[High-Voltage DC Bus] --> PHASE_U["Phase U Half-Bridge"] HV_BUS --> PHASE_V["Phase V Half-Bridge"] HV_BUS --> PHASE_W["Phase W Half-Bridge"] subgraph "Phase U Leg" U_HIGH["High-Side Switch"] --> U_OUT["Phase U Output"] U_LOW["Low-Side Switch"] --> INV_GND[Inverter Ground] HV_BUS --> U_HIGH U_OUT --> U_LOW U_HIGH_D["VBMB17R18S"] --> U_HIGH U_LOW_D["VBMB17R18S"] --> U_LOW end subgraph "Phase V Leg" V_HIGH["High-Side Switch"] --> V_OUT["Phase V Output"] V_LOW["Low-Side Switch"] --> INV_GND HV_BUS --> V_HIGH V_OUT --> V_LOW V_HIGH_D["VBMB17R18S"] --> V_HIGH V_LOW_D["VBMB17R18S"] --> V_LOW end subgraph "Phase W Leg" W_HIGH["High-Side Switch"] --> W_OUT["Phase W Output"] W_LOW["Low-Side Switch"] --> INV_GND HV_BUS --> W_HIGH W_OUT --> W_LOW W_HIGH_D["VBMB17R18S"] --> W_HIGH W_LOW_D["VBMB17R18S"] --> W_LOW end U_OUT --> OUTPUT_FILTER["Output LC Filter"] V_OUT --> OUTPUT_FILTER W_OUT --> OUTPUT_FILTER OUTPUT_FILTER --> LOAD[Critical Load] end subgraph "Gate Driving & Protection" DRIVER_IC["Three-Phase Gate Driver"] --> U_HIGH_D DRIVER_IC --> U_LOW_D DRIVER_IC --> V_HIGH_D DRIVER_IC --> V_LOW_D DRIVER_IC --> W_HIGH_D DRIVER_IC --> W_LOW_D SNUBBER_CIRCUIT["RC Snubber"] --> U_HIGH SNUBBER_CIRCUIT --> V_HIGH SNUBBER_CIRCUIT --> W_HIGH CURRENT_SENSE["Current Sensors"] --> PROTECTION["Protection Circuit"] PROTECTION --> FAULT["Fault Signal"] FAULT --> DRIVER_IC end style U_HIGH_D fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style V_HIGH_D fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style W_HIGH_D fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Auxiliary Power & Battery Management Topology Detail

graph LR subgraph "Battery Management & Switching" BATTERY[48V Battery Bank] --> BAT_SWITCH["Battery Switch"] BAT_SWITCH --> Q_BAT_MAIN["VBGQA1802
Main Switch"] Q_BAT_MAIN --> CHARGER_IN["Charger Input"] Q_BAT_MAIN --> INVERTER_DC["Inverter DC Link"] subgraph "Battery String Management" BAT_STRING1["Battery String 1"] --> Q_BAT1["VBGQA1802"] BAT_STRING2["Battery String 2"] --> Q_BAT2["VBGQA1802"] BAT_STRING3["Battery String 3"] --> Q_BAT3["VBGQA1802"] end Q_BAT1 --> COMMON_BUS Q_BAT2 --> COMMON_BUS Q_BAT3 --> COMMON_BUS COMMON_BUS --> BAT_SWITCH end subgraph "Auxiliary DC-DC Power Supply" CHARGER_IN --> BUCK_CONVERTER["Buck Converter"] BUCK_CONVERTER --> SW_NODE["Switch Node"] SW_NODE --> Q_AUX["VBGQA1802
Synchronous Rectifier"] Q_AUX --> OUTPUT_INDUCTOR["Output Inductor"] OUTPUT_INDUCTOR --> AUX_CAP["Output Capacitors"] AUX_CAP --> AUX_RAILS["Auxiliary Rails"] AUX_RAILS --> CONTROL["Control System"] AUX_RAILS --> SENSORS["Monitoring Sensors"] AUX_RAILS --> COMM["Communication Modules"] end subgraph "Thermal & Protection" PCB_POUR["PCB Thermal Copper Pour"] --> Q_BAT_MAIN PCB_POUR --> Q_AUX HEATSINK["Local Heatsink"] --> Q_BAT_MAIN TEMP_MONITOR["Temperature Monitor"] --> CONTROL OVERCURRENT["Overcurrent Protection"] --> Q_BAT_MAIN OVERCURRENT --> Q_AUX CONTROL --> SHUTDOWN["Shutdown Control"] SHUTDOWN --> Q_BAT_MAIN SHUTDOWN --> Q_AUX end style Q_BAT_MAIN fill:#fff3e0,stroke:#ff9800,stroke-width:2px style Q_AUX fill:#fff3e0,stroke:#ff9800,stroke-width:2px style Q_BAT1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px
Download PDF document
Download now:VBMB185R10

Sample Req

Online

Telephone

400-655-8788

WeChat

Topping

Sample Req
Online
Telephone
WeChat