With the rapid advancement of global photovoltaic (PV) installations and the increasing demand for system efficiency and longevity, the intelligent PV combiner box has evolved into a critical hub for energy convergence, monitoring, and protection. Its internal power management and switching systems, serving as the core for current handling and circuit protection, directly determine the overall power loss, operational safety, thermal performance, and long-term stability of the PV array. The power MOSFET, as a key switching and protection component in these circuits, significantly impacts system efficiency, voltage withstand capability, power density, and field reliability through its selection. Addressing the high DC voltage, wide temperature variations, and stringent safety requirements of PV combiner boxes, this article proposes a complete, actionable power MOSFET selection and design implementation plan with a scenario-oriented and systematic design approach.
I. Overall Selection Principles: High Voltage Endurance and Robustness
The selection of power MOSFETs for PV applications must prioritize high voltage blocking capability, low conduction loss under high current, and exceptional reliability under harsh environmental conditions, achieving a balance between electrical performance, thermal management, and long-term durability.
Voltage and Current Margin Design: Based on the maximum system open-circuit voltage (often 600V, 1000V, or 1500V DC strings), select MOSFETs with a voltage rating (VDS) exceeding the maximum string voltage with a safety margin ≥30-40% to handle voltage spikes from lightning surges, switching transients, and grid faults. The current rating (ID) should be selected based on the maximum continuous current per string or the total combined current, with a recommended derating to 50-60% of the device’s rated ID for reliable long-term operation.
Low Loss Priority: Conduction loss is the primary loss mechanism in combiner box switches. Lower on-resistance (Rds(on)) is crucial to minimize power dissipation and associated temperature rise, especially under high current flow from multiple parallel strings. Switching loss, while often secondary in frequently switched applications, should still be considered for MOSFETs used in active protection circuits.
Package and Heat Dissipation Coordination: The high-power nature and potential outdoor installation necessitate packages with excellent thermal performance and isolation. Through-hole packages like TO-220F and TO-263 (D2PAK) offer good heat sinking capability to external heatsinks. Surface-mount packages (e.g., DFN) require careful PCB thermal design with large copper areas and thermal vias.
Reliability and Environmental Adaptability: Devices must withstand wide ambient temperature ranges (-40°C to +85°C or beyond), high humidity, and potential corrosive atmospheres. Focus on the device’s maximum junction temperature, avalanche energy rating, and the stability of parameters like Vth and Rds(on) over temperature and time.
II. Scenario-Specific MOSFET Selection Strategies
The main functions within an intelligent PV combiner box can be categorized into three types: high-voltage DC string switching/protection, reverse current blocking (anti-islanding/backfeed prevention), and auxiliary power/communication module control. Each function has distinct operating characteristics, requiring targeted selection.
Scenario 1: High-Voltage DC String Input Switching & Protection (600V-1000V Systems)
This application involves switching or isolating individual PV strings. MOSFETs must block high DC voltage, handle string current, and potentially withstand surge events.
Recommended Model: VBMB17R20S (Single N-MOS, 700V, 20A, TO-220F)
Parameter Advantages:
VDS of 700V provides ample margin for 600V system voltages, offering robust protection against voltage spikes.
Relatively low Rds(on) of 160 mΩ (@10V) for its voltage class, minimizing conduction loss per string.
TO-220F package (fully isolated) facilitates easy mounting on a common heatsink for multiple channels, improving thermal management.
SJ_Multi-EPI technology offers a good balance of high voltage and switching characteristics.
Scenario Value:
Enables intelligent per-string monitoring and disconnection for maintenance, fault isolation, or optimizer functionality.
The 20A current rating is suitable for typical string currents, and the isolated package simplifies system insulation design.
Design Notes:
Gate drive requires a dedicated high-side driver or isolated driver IC due to the floating source potential.
Incorporate TVS diodes and varistors for surge protection on each input. Ensure proper creepage and clearance distances on PCB.
Scenario 2: Reverse Current Blocking & Main Current Path (Low-Voltage Side / Central Switch)
To prevent reverse current flow from the inverter back to the array or to act as a central disconnect, MOSFETs with very low Rds(on) are critical to minimize losses in the high combined current path.
Recommended Model: VBGL1805 (Single N-MOS, 80V, 120A, TO-263)
Parameter Advantages:
Extremely low Rds(on) of 4.4 mΩ (@10V) ensures minimal voltage drop and power loss even under total array currents of tens to hundreds of amps.
High continuous current rating of 120A handles the aggregated current from multiple parallel strings.
TO-263 package offers very low thermal resistance for efficient heat transfer to a large PCB copper plane or heatsink.
SGT technology provides excellent figures of merit for low-voltage, high-current applications.
Scenario Value:
Serves as an efficient, solid-state main disconnect or reverse blocking switch, replacing mechanical contactors for faster, wear-free operation.
Dramatically reduces total system power loss compared to higher Rds(on) devices or fuses alone.
Design Notes:
Requires a driver with strong sink/source capability (e.g., >2A) to quickly charge/discharge the large gate capacitance.
PCB design must use thick copper traces or internal layers and multiple thermal vias under the package to manage heat.
Scenario 3: Auxiliary Power Supply & Communication Module Control
Auxiliary circuits power the combiner box's own electronics (MCU, sensors, communication). Efficiency and compactness are key, often involving lower voltage power conversion and load switching.
Recommended Model: VB8338 (Single P-MOS, -30V, -4.8A, SOT23-6)
Parameter Advantages:
P-channel configuration simplifies high-side switching for loads powered from a positive rail, avoiding the need for a charge pump in simple circuits.
Low Rds(on) of 49 mΩ (@10V) and 54 mΩ (@4.5V) ensures high efficiency even when driven from a 3.3V or 5V MCU GPIO.
Ultra-compact SOT23-6 package saves significant board space for highly integrated control boards.
Scenario Value:
Ideal for power rail sequencing, on/off control of communication modules (4G, PLC), or sensor arrays to minimize standby consumption.
Enables compact and efficient design of the box's internal DC-DC converter circuits (e.g., for synchronous rectification).
Design Notes:
For high-side switching, gate control can be implemented with a small N-MOS or NPN transistor as a level shifter.
Include gate-source pull-up resistors to ensure defined off-state.
III. Key Implementation Points for System Design
Drive Circuit Optimization:
High-Voltage MOSFETs (e.g., VBMB17R20S): Mandatory use of isolated gate driver ICs. Pay careful attention to the driver's common-mode transient immunity (CMTI) rating. Implement negative gate turn-off voltage if possible for enhanced noise immunity in noisy environments.
High-Current MOSFETs (e.g., VBGL1805): Use drivers with high peak current capability to minimize switching losses. Keep gate drive loops extremely short to reduce parasitic inductance.
Low-Power P-MOS (e.g., VB8338): Ensure the gate drive circuit can fully enhance the MOSFET given the available supply voltage (Vgs). Use RC filters on the gate if necessary to dampen noise.
Thermal Management Design:
Tiered Strategy: High-power devices (VBGL1805) require dedicated heatsinks or thermal connection to the metallic enclosure. Medium-power devices (VBMB17R20S) can share a common extruded heatsink inside the box. Low-power devices rely on PCB copper.
Derating: Apply significant current derating based on the maximum expected ambient temperature inside the sealed combiner box, which can be significantly higher than outside air temperature.
EMC and Reliability Enhancement:
Surge & Spike Protection: Primary protection is achieved via varistors and gas discharge tubes at the inputs. Secondary protection using TVS diodes should be placed close to the MOSFET drains. Consider RC snubbers across MOSFETs to damp high-frequency ringing.
Protection Circuits: Implement hardware-based overcurrent detection (using shunts or Hall sensors) and overtemperature monitoring on the heatsink. Ensure the drive circuit can be disabled by the protection logic.
IV. Solution Value and Expansion Recommendations
Core Value:
High Efficiency & Low Loss: The combination of high-voltage SJ MOSFETs and ultra-low Rds(on) SGT MOSFETs minimizes system conduction losses, maximizing energy yield.
Enhanced Safety & Intelligence: Enables reliable per-string disconnection, rapid fault isolation, and smart power management for auxiliary systems.
High Robustness: Selected devices and system design principles ensure stable operation under the demanding electrical and environmental conditions of PV installations.
Optimization and Adjustment Recommendations:
Voltage Scaling: For 1000V or 1500V systems, consider MOSFETs with 900V-1200V ratings (e.g., VBMB19R10S, VBFB19R02S for very low current sensing applications).
Current Scaling: For larger commercial/utility combiner boxes with higher currents, consider paralleling VBGL1805 devices or selecting even lower Rds(on) modules.
Integration: For space-constrained designs, explore using DFN packages (e.g., VBQA1407) for high-current paths if thermal design can be managed effectively via the PCB.
Advanced Protection: For enhanced reliability, consider MOSFETs with integrated avalanche ruggedness or use them in conjunction with dedicated arc-fault detection circuits.
The selection of power MOSFETs is a cornerstone in designing efficient, safe, and intelligent photovoltaic combiner boxes. The scenario-based selection and systematic design methodology proposed herein aim to achieve the optimal balance among high-voltage blocking, low loss, thermal robustness, and long-term field reliability. As PV technology evolves towards higher system voltages and smarter functionalities, future exploration may include the use of Silicon Carbide (SiC) MOSFETs for the highest efficiency and switching speed requirements in advanced protection circuits, paving the way for next-generation PV system innovation.

Detailed Functional Topology Diagrams