With the rapid expansion of AI computing and the critical need for data center operational continuity, the Uninterruptible Power Supply (UPS) system serves as the essential safeguard for power infrastructure. The bypass system, acting as the "safety valve" of the UPS, requires instantaneous and reliable switching to utility power in case of internal faults, ensuring zero-interruption power to critical AI loads. The selection of power MOSFETs directly determines the system's switching speed, power loss, reliability under surge conditions, and long-term stability. Addressing the stringent demands of AI data centers for ultra-high reliability, efficiency, and power density, this article centers on scenario-based adaptation to reconstruct the MOSFET selection logic for the UPS bypass path, providing an optimized solution ready for direct implementation.
I. Core Selection Principles and Scenario Adaptation Logic
Core Selection Principles
1. Voltage Rating with High Surge Margin: For AC line voltages (e.g., 480VAC) and associated DC bus levels, MOSFET voltage ratings must withstand peak line voltages plus significant safety margin (≥100% for 600V+ devices) to handle lightning surges and switching transients.
2. Ultra-Low Losses for High Currents: Prioritize devices with extremely low on-state resistance (Rds(on)) and optimized gate charge (Qg) to minimize conduction losses in high-current paths and enable fast switching without excessive drive loss.
3. Robust Package for Thermal & Power Handling: Select packages like TO247, TO263, or TO3P for high-power stages to ensure effective heat dissipation and high current capability. Compact packages like SOP8 are suitable for control and driver circuits.
4. Uncompromising Reliability for 24/7 Operation: Devices must exhibit excellent thermal stability, high avalanche energy rating, and strong resilience against voltage spikes to meet the demands of continuous, mission-critical operation.
Scenario Adaptation Logic
Based on the functional blocks within a UPS bypass system, MOSFET applications are divided into three main scenarios: High-Voltage Bypass Static Switch (Primary Path), DC Bus & Auxiliary Power Control (Support Circuitry), and Driver & Protection Circuitry (Control & Safety). Device parameters are matched to the specific voltage, current, and switching requirements of each stage.
II. MOSFET Selection Solutions by Scenario
Scenario 1: High-Voltage Bypass Static Switch (Up to 600V, Medium Current) – Primary Path Device
Recommended Model: VBFB16R08SE (Single N-MOS, 600V, 8A, TO251)
Key Parameter Advantages: Utilizes SJ_Deep-Trench technology, offering a balanced Rds(on) of 460mΩ at 10V Vgs. The 600V voltage rating provides ample margin for 480VAC line applications, handling peak voltages and surges reliably.
Scenario Adaptation Value: The TO251 package offers a robust footprint for high-voltage isolation and heat dissipation. The Super Junction structure enables lower switching losses compared to planar MOSFETs at high voltages, crucial for the fast, efficient switching required in static transfer switches (STS). Suitable for the initial switching stage or for parallel configurations to handle higher currents.
Applicable Scenarios: Primary AC bypass switching path, surge protection circuitry, or as part of a paralleled array for higher current static switches.
Scenario 2: DC Bus & Intermediate Power Control (Medium Voltage, High Current) – Support Circuitry Device
Recommended Model: VBGL11505 (Single N-MOS, 150V, 140A, TO263)
Key Parameter Advantages: Features SGT (Shielded Gate Trench) technology, achieving an exceptionally low Rds(on) of 5.6mΩ at 10V Vgs. The 140A continuous current rating handles high DC link or output currents with minimal loss.
Scenario Adaptation Value: The TO263 (D²PAK) package provides an excellent balance of high current capability, low thermal resistance, and a compact footprint for PCB mounting. The ultra-low Rds(on) drastically reduces conduction losses in high-current paths (e.g., battery connection, inverter output stage), directly improving system efficiency and reducing thermal stress.
Applicable Scenarios: DC bus switching, battery disconnect/connect switches, output stage of the inverter, or any high-current DC path within the UPS/bypass system.
Scenario 3: Driver & Protection Circuitry (Medium Voltage, Complementary Pair) – Control & Safety Device
Recommended Model: VBA5615 (Dual N+P MOSFET, ±60V, 9A/-8A, SOP8)
Key Parameter Advantages: Integrates a matched N-Channel and P-Channel MOSFET in one SOP8 package with low and balanced Rds(on) (15mΩ N-ch, 17mΩ P-ch at 10V). The ±60V rating is suitable for auxiliary power rails and driver circuits.
Scenario Adaptation Value: The integrated complementary pair saves significant PCB space and simplifies circuit design for half-bridge or push-pull driver stages. Excellent parameter consistency ensures reliable synchronous operation. Ideal for driving the gates of larger primary MOSFETs or controlling auxiliary power rails that require both high-side and low-side switching functionality.
Applicable Scenarios: Gate driver output stages for primary switches, auxiliary power supply (e.g., 48V/24V) OR-ing circuits, and general-purpose complementary switching functions within control boards.
III. System-Level Design Implementation Points
Drive Circuit Design
VBFB16R08SE: Requires a dedicated high-side gate driver IC with sufficient drive voltage (10-15V) and current capability to achieve fast switching. Careful attention to Miller plateau handling is crucial.
VBGL11505: Needs a powerful gate driver capable of sourcing/sinking high peak currents to charge/discharge the large gate capacitance quickly, minimizing switching times.
VBA5615: Can be driven directly by a standard gate driver IC or, for lower frequency switching, by a microcontroller with a buffer. Ensure the drive voltage meets the specified Vgs levels for optimal Rds(on).
Thermal Management Design
Graded Heat Dissipation Strategy: VBGL11505 requires a dedicated heatsink or a large, thick copper area on the PCB. VBFB16R08SE benefits from a PCB copper pour and potentially a small clip-on heatsink. VBA5615 typically dissipates heat adequately through its package and standard PCB copper.
Derating Design Standard: Design for a continuous operating current at 60-70% of the rated value in high-ambient-temperature environments (e.g., >50°C inside UPS cabinet). Maintain a junction temperature safely below the maximum rating with ample margin.
EMC and Reliability Assurance
EMI Suppression: Utilize snubber circuits (RC or RCD) across the drain-source of VBFB16R08SE to dampen high-frequency ringing. Ensure minimal loop area in high di/dt and dv/dt paths.
Protection Measures: Implement comprehensive overcurrent and overtemperature protection for all power stages. Use TVS diodes or varistors at the AC input and on the DC bus to clamp voltage surges. Gate protection zeners and series resistors are recommended for all MOSFETs to prevent Vgs overshoot and ESD damage.
IV. Core Value of the Solution and Optimization Suggestions
The power MOSFET selection solution for AI Data Center UPS Bypass Systems, based on scenario adaptation logic, achieves comprehensive coverage from the main AC power path to internal DC control and driver circuits. Its core value is mainly reflected in the following three aspects:
Enhanced System Efficiency and Power Density: By selecting the VBGL11505 with its ultra-low Rds(on) for high-current DC paths and the efficient SJ MOSFET VBFB16R08SE for high-voltage AC switching, conduction and switching losses are minimized across the board. This contributes to higher overall UPS efficiency, reducing operational costs and heat generation within the data center power room. The compact SOP8 package of the VBA5615 further aids in achieving high control board density.
Maximized Reliability for Critical Infrastructure: The chosen devices offer substantial voltage and current margins. The robust packages (TO251, TO263) and advanced technologies (SJ, SGT) ensure stable operation under the electrical and thermal stresses typical of UPS systems. This selection, combined with rigorous protection design, forms a foundation for the "five-nines" (99.999%) availability required by AI data centers.
Optimized Cost-Reliability Balance for Industrial Scale: The recommended MOSFETs are mature, widely available components. Compared to using the latest wide-bandgap devices in all stages, this solution provides a highly reliable and performance-optimized architecture at a compelling total cost of ownership (TCO), making it suitable for large-scale deployment in data center power systems.
In the design of AI Data Center UPS Bypass Systems, power MOSFET selection is a cornerstone for achieving fault-tolerant, efficient, and reliable power switching. The scenario-based selection solution proposed in this article, by accurately matching device characteristics to specific functional blocks and integrating robust system-level design practices, provides a comprehensive and actionable technical reference. As data center power demands grow and efficiency standards tighten, future evolution may involve the strategic integration of Silicon Carbide (SiC) MOSFETs for the highest voltage/highest frequency switching nodes, while retaining optimized silicon MOSFETs for optimal cost-performance in other stages, paving the way for the next generation of ultra-resilient and efficient power protection systems.

Detailed Topology Diagrams