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Smart AI Integrated AC-DC Immersion Liquid Cooling Energy Storage System Power MOSFET Selection Solution: High-Density and High-Reliability Power Management Adaptation Guide
AI AC-DC Immersion Cooling Energy Storage System Power MOSFET Topology

AI AC-DC Immersion Cooling Energy Storage System Overall Topology

graph LR %% Main Power Flow subgraph "Three-Phase AC-DC Front-End (Power Intake)" AC_IN["Three-Phase 400VAC Input"] --> EMI_FILTER["EMI Input Filter"] EMI_FILTER --> RECTIFIER["Three-Phase Rectifier Bridge"] RECTIFIER --> PFC_INDUCTOR["PFC Inductor"] PFC_INDUCTOR --> PFC_NODE["PFC Switching Node"] PFC_NODE --> Q_PFC["VBM18R10S
800V/10A SJ MOSFET"] Q_PFC --> HV_BUS["High-Voltage DC Bus
~600VDC"] HV_BUS --> PFC_CONTROLLER["PFC Controller"] PFC_CONTROLLER --> PFC_DRIVER["Gate Driver"] PFC_DRIVER --> Q_PFC end subgraph "Intermediate DC-DC & Pump Drive (Distribution & Thermal Management)" HV_BUS --> DC_DC_IN["DC-DC Converter Input"] DC_DC_IN --> Q_BUS["VBP1606S
60V/150A Trench MOSFET"] Q_BUS --> INTER_BUS["Intermediate Bus
48V/12V"] INTER_BUS --> PUMP_DRIVER["Coolant Pump Driver"] PUMP_DRIVER --> Q_PUMP["VBP1606S
60V/150A Trench MOSFET"] Q_PUMP --> IMMERSION_PUMP["Immersion Cooling Pump"] INTER_BUS --> AUX_POWER["Auxiliary Power Supply"] AUX_POWER --> CONTROL_CIRCUITS["Control & Monitoring"] end subgraph "Low-Voltage High-Current POL Conversion (Core Power Delivery)" INTER_BUS --> POL_INPUT["POL Converter Input"] POL_INPUT --> Q_POL1["VBQF1202
20V/100A Trench MOSFET"] POL_INPUT --> Q_POL2["VBQF1202
20V/100A Trench MOSFET"] POL_INPUT --> Q_POL3["VBQF1202
20V/100A Trench MOSFET"] Q_POL1 --> POL_OUTPUT["Point-of-Load Output
0.8-1.2V @ High Current"] Q_POL2 --> POL_OUTPUT Q_POL3 --> POL_OUTPUT POL_OUTPUT --> AI_PROCESSOR["AI Processor/ASIC Load"] POL_CONTROLLER["Multi-Phase POL Controller"] --> POL_DRIVER["Gate Driver Array"] POL_DRIVER --> Q_POL1 POL_DRIVER --> Q_POL2 POL_DRIVER --> Q_POL3 end %% Thermal & Protection Systems subgraph "Immersion Cooling & Thermal Management" IMMERSION_PUMP --> COOLANT_FLOW["Dielectric Coolant Flow"] COOLANT_FLOW --> HEAT_EXCHANGER["Liquid-to-Liquid Heat Exchanger"] HEAT_EXCHANGER --> EXTERNAL_COOLING["External Cooling Loop"] COOLANT_FLOW --> Q_POL1 COOLANT_FLOW --> Q_POL2 COOLANT_FLOW --> Q_POL3 COOLANT_FLOW --> Q_BUS COOLANT_FLOW --> Q_PUMP COOLANT_FLOW --> Q_PFC TEMP_SENSORS["Temperature Sensors"] --> CONTROL_UNIT["Thermal Management Controller"] CONTROL_UNIT --> PUMP_DRIVER end subgraph "Protection & Monitoring Circuits" OVP["Over-Voltage Protection"] --> Q_PFC OCP["Over-Current Protection"] --> Q_BUS OTP["Over-Temperature Protection"] --> ALL_MOSFETS CURRENT_MONITOR["High-Precision Current Sensing"] --> PROTECTION_LOGIC["Protection Logic"] VOLTAGE_MONITOR["Voltage Monitoring"] --> PROTECTION_LOGIC PROTECTION_LOGIC --> FAULT_SIGNAL["Fault Signal Output"] TVS_ARRAY["TVS Protection Array"] --> GATE_DRIVERS["All Gate Drivers"] SNUBBER_CIRCUITS["RC/RCD Snubber Circuits"] --> Q_PFC SNUBBER_CIRCUITS --> Q_BUS end %% Communication & Control CONTROL_CIRCUITS --> CAN_BUS["CAN Bus Interface"] CONTROL_CIRCUITS --> ETHERNET["Ethernet Communication"] CONTROL_CIRCUITS --> CLOUD_CONNECT["Cloud Connectivity"] CONTROL_CIRCUITS --> PFC_CONTROLLER CONTROL_CIRCUITS --> POL_CONTROLLER CONTROL_CIRCUITS --> PROTECTION_LOGIC %% Style Definitions style Q_PFC fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_BUS fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_PUMP fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_POL1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style Q_POL2 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style Q_POL3 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style AI_PROCESSOR fill:#fce4ec,stroke:#e91e63,stroke-width:2px

Driven by the demands of AI computing and green data centers, AI-integrated AC-DC immersion liquid-cooled energy storage systems have become a cornerstone for high-efficiency, high-density power management. Their power conversion and management subsystems, serving as the "energy heart" of the entire unit, must provide efficient, reliable, and precise power delivery and switching for critical loads such as PFC stages, DC-DC converters, pump drivers, and auxiliary circuits. The selection of power MOSFETs is pivotal in determining the system's conversion efficiency, power density, thermal performance under immersion, and long-term reliability. Addressing the stringent requirements of immersion cooling systems for ultra-high power density, exceptional thermal conductivity, electrical safety, and EMI control, this article reconstructs the MOSFET selection logic centered on scenario-based adaptation, providing an optimized, ready-to-implement solution.
I. Core Selection Principles and Scenario Adaptation Logic
Core Selection Principles
Voltage & Safety Margin: For AC-DC stages (e.g., PFC) handling rectified high voltage, MOSFET voltage ratings must withstand peak line voltages and transients with ample margin (e.g., ≥800V for 3-phase AC). For DC-DC bus and pump drives, margins should accommodate switching spikes and fault conditions.
Ultra-Low Loss is Paramount: Prioritize devices with minimal combined conduction loss (low Rds(on)) and switching loss (low Qg, Qrr). This is critical for maximizing efficiency in always-on systems and minimizing heat generation within the immersion fluid.
Package & Immersion Compatibility: Select packages (TO-220, TO-247, TO-220F, DFN) that offer robust construction, reliable isolation, and compatibility with immersion coolant. Thermal performance must be evaluated in conjunction with the liquid cooling medium.
Reliability Under Continuous Stress: Devices must be rated for 24/7 operation at elevated case temperatures possible before heat is carried away by coolant. Consider avalanche ruggedness, gate oxide reliability, and resistance to corrosion or electrochemical migration in immersed environments.
Scenario Adaptation Logic
Based on the core power flow and load types within the AI immersion energy storage system, MOSFET applications are divided into three primary scenarios: High-Voltage AC-DC Front-End (Power Intake), Intermediate Bus & Pump Drive (Power Distribution & Thermal Management), and Low-Voltage, High-Current Point-of-Load (POL) Conversion (Core Power Delivery). Device parameters and characteristics are matched accordingly.
II. MOSFET Selection Solutions by Scenario
Scenario 1: High-Voltage AC-DC Front-End (e.g., 3-Phase PFC Stage) – Power Intake Device
Recommended Model: VBM18R10S (Single-N, 800V, 10A, TO-220)
Key Parameter Advantages: Utilizes SJ_Multi-EPI (Super Junction) technology, achieving a balanced performance with 800V breakdown voltage and Rds(on) of 600mΩ at 10V Vgs. The 10A current rating is suitable for multi-parallel configurations in high-power PFC circuits.
Scenario Adaptation Value: The 800V rating provides a strong safety margin for 3-phase applications (rectified voltage ~565V). The TO-220 package offers excellent creepage and clearance distances, beneficial for high-voltage PCB design, and its robust mechanical structure is suitable for immersion. Low gate charge inherent to SJ technology facilitates high-frequency switching, improving PFC stage power density and efficiency.
Scenario 2: Intermediate DC Bus Conversion & Coolant Pump Drive – Distribution & Thermal Management Device
Recommended Model: VBP1606S (Single-N, 60V, 150A, TO-247)
Key Parameter Advantages: Features an extremely low Rds(on) of 5mΩ at 10V Vgs and a high continuous current rating of 150A using advanced Trench technology.
Scenario Adaptation Value: The ultra-low conduction loss minimizes heat generation in the critical power path of the DC-DC intermediate bus converter (e.g., 48V to 12V). The high current capability and robust TO-247 package make it ideal for driving high-power immersion coolant pumps, ensuring reliable thermal management. Its parameters support high-frequency synchronous rectification or half-bridge topologies, optimizing converter efficiency.
Scenario 3: Low-Voltage, High-Current Point-of-Load (POL) Conversion – Core Power Delivery Device
Recommended Model: VBQF1202 (Single-N, 20V, 100A, DFN8(3x3))
Key Parameter Advantages: Employs Trench technology to achieve an ultra-low Rds(on) of 2mΩ at 10V Vgs and 2.5mΩ at 4.5V Vgs. Rated for 100A continuous current in a compact DFN package.
Scenario Adaptation Value: The ultra-low Rds(on) is critical for minimizing loss in high-current POL converters (e.g., 12V/48V to sub-1V for AI processors/ASICs). The tiny DFN8(3x3) footprint enables extremely high power density on the PCB, which is essential for immersion systems where space near processors is premium. Its low gate threshold voltage (0.6V) allows for efficient drive from low-voltage controller ICs.
III. System-Level Design Implementation Points
Drive Circuit Design
VBM18R10S: Requires a dedicated high-side gate driver IC with sufficient drive capability and isolation where needed. Careful attention to minimizing parasitic inductance in the high-voltage switching loop is crucial.
VBP1606S: Pair with a high-current gate driver. Use low-inductance gate drive paths and consider using a negative turn-off voltage for faster switching and better noise immunity in pump drive applications.
VBQF1202: Optimize layout for minimal power loop inductance. Use a driver placed very close to the MOSFET. Multi-phase interleaving is recommended for POL applications to manage current and thermal stress.
Thermal Management within Immersion
Graded Heat Transfer Strategy: All packages rely on the immersion coolant as the primary heat sink. Ensure PCB designs facilitate efficient heat transfer from the device package to the board and then to the coolant. The TO-247 and TO-220 packages offer good thermal mass.
Derating in Liquid: While immersion cooling is highly effective, derating guidelines should still be followed based on the estimated junction-to-coolant thermal resistance. Monitor for potential local fluid heating.
EMC and Reliability Assurance
Immersion-Specific EMI: The dielectric fluid can alter parasitic capacitances. Careful snubber design (RC across drain-source for VBM18R10S) and input filtering are essential to meet EMI standards.
Protection for Immersion: Ensure all gate drive circuits are protected against transients. Use gate resistors and TVS diodes. Select conformal coatings or potting materials compatible with the specific immersion coolant to prevent long-term degradation or galvanic corrosion.
IV. Core Value of the Solution and Optimization Suggestions
The power MOSFET selection solution for AI immersion liquid-cooled energy storage systems, based on scenario adaptation logic, achieves optimal device matching from high-voltage intake to ultra-high-current POL delivery. Its core value is threefold:
Maximized System Efficiency for PUE Reduction: By selecting specialized devices—SJ MOSFETs for high-voltage switching, ultra-low Rds(on) Trench MOSFETs for bus conversion and POL—conduction losses are minimized at every stage. This contributes directly to a superior Power Usage Effectiveness (PUE), reducing operational costs and heat load on the immersion system.
Enabling Ultra-High Power Density and Reliability: The use of compact, high-performance packages like DFN for POL stages allows for more power stages in less volume, crucial for compute-dense AI racks. The selected high-voltage and pump-drive MOSFETs offer robust electrical and mechanical characteristics, ensuring stable operation in the unique environment of immersion cooling, leading to higher system MTBF.
Balanced Performance and Cost-Effectiveness: This solution leverages mature, high-volume MOSFET technologies (SJ, Trench) that offer an excellent balance of performance and cost. Compared to emerging wide-bandgap solutions, it provides a more immediately cost-effective and supply-chain-stable path to building high-performance immersion-cooled energy storage systems, accelerating time-to-market.
In the design of AI-integrated immersion-cooled energy storage systems, power MOSFET selection is a foundational element for achieving unprecedented levels of efficiency and power density. This scenario-based selection solution, by aligning device capabilities with specific subsystem requirements and incorporating design considerations for the immersion environment, provides a comprehensive technical blueprint. As AI computing demands escalate, future exploration will likely focus on the integration of silicon carbide (SiC) MOSFETs for the highest voltage/hardest switching stages and the development of intelligent, immersion-optimized power modules, paving the way for the next generation of ultra-efficient, high-density data center infrastructure.

Detailed Topology Diagrams

High-Voltage AC-DC Front-End (PFC Stage) Detail

graph LR subgraph "Three-Phase PFC Power Stage" AC_L1["Phase L1"] --> FILTER1["EMI Filter"] AC_L2["Phase L2"] --> FILTER2["EMI Filter"] AC_L3["Phase L3"] --> FILTER3["EMI Filter"] FILTER1 --> RECT1["Rectifier"] FILTER2 --> RECT2["Rectifier"] FILTER3 --> RECT3["Rectifier"] RECT1 --> INDUCTOR1["Boost Inductor"] RECT2 --> INDUCTOR2["Boost Inductor"] RECT3 --> INDUCTOR3["Boost Inductor"] INDUCTOR1 --> SW_NODE["Switching Node"] INDUCTOR2 --> SW_NODE INDUCTOR3 --> SW_NODE SW_NODE --> MOSFET["VBM18R10S
800V/10A SJ MOSFET"] MOSFET --> HV_OUT["High-Voltage DC Output
~600VDC"] end subgraph "Control & Protection" CTRL_IC["PFC Controller IC"] --> GATE_DRV["Gate Driver"] GATE_DRV --> MOSFET VOLT_FB["Voltage Feedback"] --> CTRL_IC CURR_FB["Current Feedback"] --> CTRL_IC TEMP_SENSE["Temperature Sensor"] --> CTRL_IC OVP_CIRCUIT["OVP Circuit"] --> PROTECTION["Protection Logic"] OCP_CIRCUIT["OCP Circuit"] --> PROTECTION PROTECTION --> CTRL_IC end subgraph "Immersion Adaptation" PKG["TO-220 Package"] --> COOLANT["Immersion Coolant"] CREEPAGE["Adequate Creepage"] --> HV_ISOLATION["High-Voltage Isolation"] SNUBBER["RC Snubber Network"] --> MOSFET TVS["TVS Protection"] --> GATE_DRV end style MOSFET fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

Intermediate Bus & Pump Drive Topology Detail

graph LR subgraph "DC-DC Intermediate Bus Converter" HV_IN["High-Voltage Input
~600VDC"] --> TRANSFORMER["Isolation Transformer"] TRANSFORMER --> RECT_STAGE["Rectification Stage"] RECT_STAGE --> Q_HIGH["VBP1606S High-Side
60V/150A"] RECT_STAGE --> Q_LOW["VBP1606S Low-Side
60V/150A"] Q_HIGH --> LC_FILTER["LC Output Filter"] Q_LOW --> GND_BUS LC_FILTER --> BUS_OUT["Intermediate Bus Output
48V/12V"] CONTROLLER_BUS["Bus Converter Controller"] --> DRIVER_BUS["High-Current Gate Driver"] DRIVER_BUS --> Q_HIGH DRIVER_BUS --> Q_LOW end subgraph "Coolant Pump Drive Circuit" BUS_OUT --> PUMP_POWER["Pump Power Input"] PUMP_POWER --> H_BRIDGE["H-Bridge Driver"] H_BRIDGE --> Q_PUMP1["VBP1606S
Pump MOSFET"] H_BRIDGE --> Q_PUMP2["VBP1606S
Pump MOSFET"] H_BRIDGE --> Q_PUMP3["VBP1606S
Pump MOSFET"] H_BRIDGE --> Q_PUMP4["VBP1606S
Pump MOSFET"] Q_PUMP1 --> PUMP_MOTOR["Immersion Pump Motor"] Q_PUMP2 --> PUMP_MOTOR Q_PUMP3 --> PUMP_MOTOR Q_PUMP4 --> PUMP_MOTOR PUMP_CONTROLLER["Pump Speed Controller"] --> H_BRIDGE TEMP_FEEDBACK["Coolant Temperature"] --> PUMP_CONTROLLER end subgraph "Thermal & Protection Features" TO247_PKG["TO-247 Package"] --> HEATSINK["Coolant Contact Surface"] LOW_RDSON["5mΩ Rds(on)"] --> MIN_LOSS["Minimal Conduction Loss"] GATE_PROTECT["Gate Protection"] --> NEG_DRIVE["Negative Turn-Off Capability"] CURRENT_LIMIT["Current Limiting"] --> PUMP_CONTROLLER OVERTEMP["Overtemperature Shutdown"] --> PROTECTION_LOGIC end style Q_HIGH fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_LOW fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_PUMP1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_PUMP2 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Low-Voltage High-Current POL Conversion Detail

graph LR subgraph "Multi-Phase Buck Converter" BUS_48V["48V/12V Input Bus"] --> PHASE1["Phase 1"] BUS_48V --> PHASE2["Phase 2"] BUS_48V --> PHASE3["Phase 3"] PHASE1 --> Q_HIGH1["VBQF1202 High-Side
20V/100A"] PHASE1 --> Q_LOW1["VBQF1202 Low-Side
20V/100A"] PHASE2 --> Q_HIGH2["VBQF1202 High-Side
20V/100A"] PHASE2 --> Q_LOW2["VBQF1202 Low-Side
20V/100A"] PHASE3 --> Q_HIGH3["VBQF1202 High-Side
20V/100A"] PHASE3 --> Q_LOW3["VBQF1202 Low-Side
20V/100A"] Q_HIGH1 --> INDUCTOR1["Output Inductor"] Q_LOW1 --> GND_POL Q_HIGH2 --> INDUCTOR2["Output Inductor"] Q_LOW2 --> GND_POL Q_HIGH3 --> INDUCTOR3["Output Inductor"] Q_LOW3 --> GND_POL INDUCTOR1 --> OUTPUT_CAP["Output Capacitors"] INDUCTOR2 --> OUTPUT_CAP INDUCTOR3 --> OUTPUT_CAP OUTPUT_CAP --> POL_OUT["POL Output
0.8-1.2V @ High Current"] end subgraph "Control & Layout Optimization" MULTI_PHASE_CTRL["Multi-Phase Controller"] --> DRIVER_ARRAY["Driver Array"] DRIVER_ARRAY --> Q_HIGH1 DRIVER_ARRAY --> Q_LOW1 DRIVER_ARRAY --> Q_HIGH2 DRIVER_ARRAY --> Q_LOW2 DRIVER_ARRAY --> Q_HIGH3 DRIVER_ARRAY --> Q_LOW3 CURRENT_BALANCE["Current Balancing"] --> MULTI_PHASE_CTRL VOLTAGE_REG["Voltage Regulation"] --> MULTI_PHASE_CTRL DFN_PACKAGE["DFN8(3x3) Package"] --> MIN_FOOTPRINT["Minimal Footprint"] POWER_PLANES["Optimized Power Planes"] --> LOW_INDUCTANCE["Low Loop Inductance"] THERMAL_VIAS["Thermal Vias"] --> COOLANT_TRANSFER["Efficient Heat Transfer"] end subgraph "Load Connection & Monitoring" POL_OUT --> AI_LOAD["AI Processor/ASIC"] VOLTAGE_SENSE["Voltage Sensing"] --> MULTI_PHASE_CTRL CURRENT_SENSE["Current Sensing"] --> MULTI_PHASE_CTRL TEMP_MONITOR["Temperature Monitor"] --> MULTI_PHASE_CTRL DYNAMIC_VID["Dynamic VID Control"] --> MULTI_PHASE_CTRL end style Q_HIGH1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style Q_LOW1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style Q_HIGH2 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style Q_LOW2 fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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