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MOSFET Selection Strategy and Device Adaptation Handbook for AI Energy Storage Inverters with High-Efficiency and High-Reliability Requirements
AI Energy Storage Inverter MOSFET Topology Diagrams

AI Energy Storage Inverter System Overall Topology Diagram

graph LR %% Main Power Flow subgraph "DC Input & High-Voltage Boost Stage" BATTERY["Battery Input
300-500VDC"] --> INPUT_FILTER["Input EMI Filter"] INPUT_FILTER --> BOOST_INDUCTOR["Boost Inductor"] BOOST_INDUCTOR --> BOOST_NODE["Boost Switching Node"] subgraph "High-Voltage Boost MOSFET" Q_BOOST["VBE165R15S
650V/15A
(TO-252)"] end BOOST_NODE --> Q_BOOST Q_BOOST --> HV_BUS["High-Voltage DC Bus
600-800VDC"] subgraph "Boost Controller & Driver" BOOST_CONTROLLER["MPPT/Boost Controller"] ISO_DRIVER["Isolated Gate Driver
(Si823x)"] BOOST_CONTROLLER --> ISO_DRIVER ISO_DRIVER --> Q_BOOST end end %% DC-AC Inversion Stage subgraph "DC-AC Inverter Bridge (Three-Phase Full Bridge)" HV_BUS --> INVERTER_IN["Inverter DC Input"] subgraph "Phase U Leg" Q_U_HIGH["VBP1602
60V/270A
(TO-247)"] Q_U_LOW["VBP1602
60V/270A
(TO-247)"] end subgraph "Phase V Leg" Q_V_HIGH["VBP1602
60V/270A
(TO-247)"] Q_V_LOW["VBP1602
60V/270A
(TO-247)"] end subgraph "Phase W Leg" Q_W_HIGH["VBP1602
60V/270A
(TO-247)"] Q_W_LOW["VBP1602
60V/270A
(TO-247)"] end INVERTER_IN --> Q_U_HIGH INVERTER_IN --> Q_V_HIGH INVERTER_IN --> Q_W_HIGH Q_U_HIGH --> OUTPUT_U["Phase U Output"] Q_V_HIGH --> OUTPUT_V["Phase V Output"] Q_W_HIGH --> OUTPUT_W["Phase W Output"] Q_U_LOW --> GND_INV Q_V_LOW --> GND_INV Q_W_LOW --> GND_INV OUTPUT_U --> Q_U_LOW OUTPUT_V --> Q_V_LOW OUTPUT_W --> Q_W_LOW end %% Output & Grid Connection subgraph "AC Output & Grid Connection" OUTPUT_U --> L_FILTER["LCL Output Filter"] OUTPUT_V --> L_FILTER OUTPUT_W --> L_FILTER L_FILTER --> GRID_RELAY["Grid Relay/Contactor"] GRID_RELAY --> GRID_OUT["AC Output
3-Phase 400VAC
50/60Hz"] GRID_OUT --> LOAD["Grid/Load Connection"] end %% Auxiliary Power & Control subgraph "Auxiliary Power & Intelligent Control System" AUX_TRANS["Auxiliary Transformer"] --> AUX_RECT["Rectifier/Regulator"] AUX_RECT --> AUX_12V["12V Auxiliary Rail"] AUX_RECT --> AUX_5V["5V Auxiliary Rail"] AUX_RECT --> AUX_3V3["3.3V Control Rail"] AUX_5V --> MAIN_MCU["Main Control MCU/DSP"] AUX_3V3 --> AI_MODULE["AI Energy Management Module"] subgraph "Intelligent Load Switches" SW_FAN["VBA1305
30V/15A (SOP8)"] SW_PUMP["VBA1305
30V/15A (SOP8)"] SW_RELAY["VBA1305
30V/15A (SOP8)"] SW_COMM["VBA1305
30V/15A (SOP8)"] end MAIN_MCU --> SW_FAN MAIN_MCU --> SW_PUMP MAIN_MCU --> SW_RELAY MAIN_MCU --> SW_COMM SW_FAN --> COOLING_FAN["Cooling Fan"] SW_PUMP --> LIQUID_PUMP["Liquid Cooling Pump"] SW_RELAY --> AUX_RELAY["Auxiliary Relay"] SW_COMM --> COMM_MODULE["Communication Module"] end %% Driving & Control Circuits subgraph "Gate Driving & System Control" subgraph "Inverter Gate Drivers" DRIVER_U["High-Current Driver
(UCC21520)"] --> Q_U_HIGH DRIVER_U --> Q_U_LOW DRIVER_V["High-Current Driver
(UCC21520)"] --> Q_V_HIGH DRIVER_V --> Q_V_LOW DRIVER_W["High-Current Driver
(UCC21520)"] --> Q_W_HIGH DRIVER_W --> Q_W_LOW end subgraph "Control & Feedback" PWM_CONTROLLER["PWM Controller"] CURRENT_SENSE["Current Sensors
(Shunt/Hall)"] VOLTAGE_SENSE["Voltage Sensors"] TEMP_SENSE["Temperature Sensors"] PWM_CONTROLLER --> DRIVER_U PWM_CONTROLLER --> DRIVER_V PWM_CONTROLLER --> DRIVER_W CURRENT_SENSE --> MAIN_MCU VOLTAGE_SENSE --> MAIN_MCU TEMP_SENSE --> MAIN_MCU end end %% Protection & Monitoring subgraph "Protection & Monitoring Circuits" subgraph "Electrical Protection" DESAT_DETECT["Desaturation Detection"] OCP_CIRCUIT["Overcurrent Protection"] OVP_CIRCUIT["Overvoltage Protection"] TVS_ARRAY["TVS Protection Array"] SNUBBER_RC["RC Snubber Circuits"] end subgraph "System Monitoring" EMC_FILTER["EMI/EMC Filter"] ISOLATION_MON["Isolation Monitoring"] LEAKAGE_DETECT["Leakage Detection"] end DESAT_DETECT --> Q_BOOST DESAT_DETECT --> Q_U_HIGH DESAT_DETECT --> Q_U_LOW SNUBBER_RC --> Q_BOOST TVS_ARRAY --> ISO_DRIVER TVS_ARRAY --> DRIVER_U end %% Thermal Management subgraph "Three-Level Thermal Management" LEVEL1["Level 1: Liquid Cooling"] --> Q_U_HIGH LEVEL1 --> Q_V_HIGH LEVEL1 --> Q_W_HIGH LEVEL2["Level 2: Forced Air Cooling"] --> Q_BOOST LEVEL3["Level 3: Natural Convection"] --> SW_FAN LEVEL3 --> SW_PUMP end %% Communication Interfaces MAIN_MCU --> CAN_BUS["CAN Bus Interface"] MAIN_MCU --> RS485["RS485 Communication"] MAIN_MCU --> WIFI_BT["Wi-Fi/Bluetooth"] MAIN_MCU --> CLOUD_IOT["Cloud IoT Interface"] %% Style Definitions style Q_BOOST fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_U_HIGH fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style SW_FAN fill:#fff3e0,stroke:#ff9800,stroke-width:2px style MAIN_MCU fill:#fce4ec,stroke:#e91e63,stroke-width:2px

With the rapid development of smart grids and renewable energy, AI energy storage inverters have become the core hub for efficient energy management and conversion. The power stage, serving as the "muscle and nerves" of the system, is responsible for critical tasks such as DC-DC boosting, DC-AC inversion, and auxiliary power management. The selection of power MOSFETs directly determines the system's conversion efficiency, power density, thermal performance, and long-term reliability. Addressing the stringent demands of AI inverters for peak efficiency, intelligent control, robustness, and compact design, this article focuses on scenario-based adaptation to develop a practical and optimized MOSFET selection strategy.
I. Core Selection Principles and Scenario Adaptation Logic
(A) Core Selection Principles: Multi-Dimensional Co-Design
MOSFET selection requires a holistic approach across voltage, loss, current handling, and package, ensuring precise alignment with the inverter's operational envelope:
Voltage & Safety Margin: For high-voltage DC links (e.g., 300V-600V from battery packs or PV), a minimum voltage derating of 20-30% is crucial to handle voltage spikes and ensure safe operation under all grid conditions.
Ultra-Low Loss Priority: Prioritize devices with minimal Rds(on) to reduce conduction loss and optimized gate & output charge (Qg, Coss) to minimize switching loss. This is paramount for achieving high efficiency across the load range, especially at partial loads common in AI-optimized operation.
Package & Thermal Synergy: Choose packages like TO-247, TO-263, or TO-220 for main power paths, ensuring low thermal resistance for effective heat dissipation. For control and auxiliary circuits, compact packages like SOP8 are preferred to save space and reduce parasitics.
Reliability for Demanding Duty: Devices must withstand continuous operation, frequent switching, and environmental stress. Robust technology (SJ, SGT, Trench) and wide junction temperature ranges are essential.
(B) Scenario Adaptation Logic: Categorization by Power Stage Function
Divide the inverter into three core power stages: First, the High-Voltage DC-DC Boost Stage, requiring high-voltage blocking capability and good switching performance. Second, the High-Current DC-AC Inverter Bridge, demanding extremely low conduction loss and high current capability for efficiency. Third, the Auxiliary & Control Power Stage, needing compact, low-loss switches for housekeeping power and intelligent control functions.
II. Detailed MOSFET Selection Scheme by Scenario
(A) Scenario 1: High-Voltage DC-DC Boost / Primary Side Switch
This stage interfaces with battery or PV, requiring high voltage blocking (≥600V) and reliable switching at moderate frequencies.
Recommended Model: VBE165R15S (Single N-MOS, 650V, 15A, TO-252)
Parameter Advantages: Super-Junction Multi-EPI technology provides excellent Rds(on)Area product (240mΩ @ 650V). 650V rating offers ample margin for 300-500V DC buses. TO-252 package balances performance and footprint.
Adaptation Value: Enables efficient boost conversion for maximum power point tracking (MPPT) in PV or battery discharge. Low gate charge facilitates faster switching, improving transient response and overall stage efficiency.
Selection Notes: Ensure proper snubber or clamp circuit for voltage spikes. Gate drive voltage must be ≥10V for full performance. Adequate heatsinking on the tab is required for continuous operation.
(B) Scenario 2: High-Current DC-AC Inverter Bridge (Full-Bridge / Three-Phase)
This is the heart of the inverter, handling the highest continuous and peak currents. Ultra-low Rds(on) is critical for minimizing conduction loss.
Recommended Model: VBP1602 (Single N-MOS, 60V, 270A, TO-247)
Parameter Advantages: Exceptionally low Rds(on) of 2mΩ at 10V minimizes conduction loss. Very high continuous current rating of 270A supports high-power output stages (e.g., 5-10kW). Advanced Trench technology ensures low switching loss.
Adaptation Value: Directly boosts inverter efficiency, potentially achieving >98% peak efficiency. High current capability provides headroom for overloads and reactive power support. Low loss reduces heatsink size and system cost.
Selection Notes: Requires a high-current, low-inductance PCB layout and a powerful gate driver (≥2A peak). Parallel devices may be needed for very high power levels. Thermal management is paramount.
(C) Scenario 3: Auxiliary Power & Intelligent Control Switching
This includes bias power supplies, fan control, relay drivers, and communication module power switches, requiring compact size and good efficiency at lower power.
Recommended Model: VBA1305 (Single N-MOS, 30V, 15A, SOP8)
Parameter Advantages: Very low Rds(on) (5.5mΩ @10V) for a small package, minimizing loss. 30V rating is perfect for 12V/24V auxiliary rails. Low Vth (1.79V) allows direct drive from 3.3V/5V MCUs. SOP8 offers a space-saving footprint.
Adaptation Value: Enables efficient point-of-load (PoL) switching and intelligent control of peripheral functions (fans, pumps). Helps reduce system standby power. Its integration simplifies board layout for control sections.
Selection Notes: Ideal for currents up to ~10A. Ensure sufficient copper for heat dissipation. A small gate resistor is recommended to damp ringing.
III. System-Level Design Implementation Points
(A) Drive Circuit Design: Matching Device Characteristics
VBE165R15S: Use an isolated gate driver IC (e.g., Si823x) with adequate drive strength. Pay attention to high-side bootstrap or isolated supply design.
VBP1602: Employ a dedicated high-current gate driver (e.g., UCC21520) with low impedance output stages. Optimize gate loop layout to prevent oscillation.
VBA1305: Can be driven directly by MCU GPIO for slow switching; use a buffer or small driver IC for faster switching. Include basic RC snubbers if needed.
(B) Thermal Management Design: Tiered Strategy
VBP1602 (Primary Focus): Mount on a large heatsink, possibly with forced air cooling. Use thermal interface material and proper mounting torque.
VBE165R15S: Requires a dedicated heatsink or a well-designed copper area on the PCB with thermal vias.
VBA1305: Local PCB copper pour is usually sufficient. Ensure overall system airflow covers these areas.
(C) EMC and Reliability Assurance
EMC Suppression: Use RC snubbers across VBE165R15S and VBP1602. Implement proper filtering at the inverter AC output and DC input. Careful layout to minimize high dv/dt and di/dt loops.
Reliability Protection:
Derating: Adhere to voltage and current derating guidelines, especially at high ambient temperatures.
Overcurrent Protection: Implement hardware-based desaturation detection for VBP1602 and VBE165R15S.
OVP/ESD: Use TVS diodes on DC input, gate pins, and auxiliary supply lines.
IV. Scheme Core Value and Optimization Suggestions
(A) Core Value
Maximized System Efficiency: The combination of low-loss devices targets >98% peak efficiency, reducing energy waste and operating costs.
High Power Density & Intelligence: The selected packages allow a compact design, while the devices support the fast control loops required for AI-driven energy management algorithms.
Robustness for Critical Applications: The chosen technologies (SJ, Trench) and packages ensure reliable 24/7 operation in demanding residential and commercial storage environments.
(B) Optimization Suggestions
Higher Power/Voltage: For inverters >10kW or with 800V+ DC buses, consider VBPB16R20S (600V, 20A, TO-3P) or VBL17R06 (700V, 6A) for specific stages.
Higher Voltage Switching: For hard-switching topologies at high frequency, VBGM1151N (150V, 80A, SGT) offers an excellent balance of speed and loss.
Integrated Solutions: Explore using VBM2609 (P-MOS, -60V, -90A) in complementary configurations or for specific protection circuits where its characteristics are beneficial.
Conclusion
Strategic MOSFET selection is fundamental to achieving the high efficiency, power density, and intelligence required by next-generation AI energy storage inverters. This scenario-based scheme, leveraging devices like the high-voltage VBE165R15S, the ultra-low-loss VBP1602, and the compact VBA1305, provides a robust foundation for developing competitive and reliable products. Future exploration into Wide Bandgap (SiC, GaN) devices and smart power modules will further push the boundaries of inverter performance.

Detailed Topology Diagrams

High-Voltage DC-DC Boost Stage Topology Detail

graph LR subgraph "DC-DC Boost Converter with MPPT" INPUT["Battery/PV Input
300-500VDC"] --> EMI_FILTER["Input EMI Filter"] EMI_FILTER --> BOOST_INDUCTOR["Boost Inductor
High-Frequency"] BOOST_INDUCTOR --> SWITCH_NODE["Switching Node"] SWITCH_NODE --> Q1["VBE165R15S
650V/15A
Super-Junction Multi-EPI"] Q1 --> OUTPUT["High-Voltage Output
600-800VDC"] OUTPUT --> BOOST_DIODE["Fast Recovery Diode"] BOOST_DIODE --> OUTPUT_CAP["Output Capacitor Bank"] OUTPUT_CAP --> HV_BUS["HV DC Bus"] INPUT --> BODY_DIODE["Body Diode"] BODY_DIODE --> SWITCH_NODE end subgraph "Control & Driving Circuit" MPPT_CONTROLLER["MPPT/Boost Controller"] --> DRIVER_IC["Isolated Gate Driver
Si823x Series"] DRIVER_IC --> GATE_RES["Gate Resistor"] GATE_RES --> Q1 subgraph "Feedback & Protection" VOLTAGE_FB["Voltage Feedback"] --> MPPT_CONTROLLER CURRENT_FB["Current Feedback"] --> MPPT_CONTROLLER TEMP_FB["Temperature Sense"] --> MPPT_CONTROLLER DESAT_CIRCUIT["Desaturation Detection"] --> PROTECTION_LOGIC["Protection Logic"] end PROTECTION_LOGIC --> DRIVER_IC end subgraph "Protection Circuits" SNUBBER["RC Snubber Circuit"] --> Q1 TVS_PROTECTION["TVS Diode Array"] --> DRIVER_IC OVP_CLAMP["Overvoltage Clamp"] --> OUTPUT end style Q1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

High-Current DC-AC Inverter Bridge Topology Detail

graph LR subgraph "Three-Phase Full-Bridge Inverter Leg (Phase U)" DC_POS["DC+ (600-800V)"] --> Q_HIGH["VBP1602
60V/270A
Rds(on)=2mΩ"] Q_HIGH --> PHASE_OUT["Phase U Output"] PHASE_OUT --> Q_LOW["VBP1602
60V/270A
Rds(on)=2mΩ"] Q_LOW --> DC_NEG["DC- Ground"] subgraph "Gate Driving Circuit" HIGH_DRIVER["High-Side Driver"] --> Q_HIGH LOW_DRIVER["Low-Side Driver"] --> Q_LOW BOOTSTRAP["Bootstrap Circuit"] --> HIGH_DRIVER ISOLATED_PWR["Isolated Power Supply"] --> HIGH_DRIVER end subgraph "Current Sensing & Protection" SHUNT_RES["Shunt Resistor"] --> CURRENT_AMP["Current Amplifier"] DESAT_DET["Desaturation Detection"] --> HIGH_DRIVER DESAT_DET --> LOW_DRIVER TEMP_PROBE["Temperature Probe"] --> Q_HIGH TEMP_PROBE --> Q_LOW end end subgraph "Parallel Operation for Higher Power" DC_POS --> Q_HIGH_2["VBP1602 Parallel"] Q_HIGH_2 --> PHASE_OUT PHASE_OUT --> Q_LOW_2["VBP1602 Parallel"] Q_LOW_2 --> DC_NEG HIGH_DRIVER --> Q_HIGH_2 LOW_DRIVER --> Q_LOW_2 end subgraph "Output Filter & Protection" PHASE_OUT --> OUTPUT_INDUCTOR["Output Inductor"] OUTPUT_INDUCTOR --> FILTER_CAP["Filter Capacitor"] FILTER_CAP --> NEUTRAL["Neutral/Grid"] subgraph "EMC Suppression" RC_SNUBBER["RC Snubber Network"] --> Q_HIGH RC_SNUBBER --> Q_LOW COMMON_MODE["Common-Mode Filter"] --> OUTPUT_INDUCTOR end end style Q_HIGH fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_LOW fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Auxiliary Power & Intelligent Control Topology Detail

graph LR subgraph "Auxiliary Power Distribution" AUX_SOURCE["12V/24V Auxiliary Source"] --> INPUT_PROTECTION["Input Protection"] INPUT_PROTECTION --> BUCK_CONVERTER["Buck Converter"] BUCK_CONVERTER --> VCC_12V["12V Power Rail"] BUCK_CONVERTER --> VCC_5V["5V Power Rail"] BUCK_CONVERTER --> VCC_3V3["3.3V Power Rail"] VCC_5V --> MCU_POWER["MCU Power Supply"] VCC_3V3 --> SENSOR_POWER["Sensor Power"] end subgraph "Intelligent Load Switching Channels" MCU_GPIO["MCU GPIO (3.3V)"] --> LEVEL_SHIFTER["Level Shifter"] LEVEL_SHIFTER --> GATE_DRIVE["Gate Drive Signal"] subgraph "Fan Control Channel" GATE_DRIVE --> Q_FAN["VBA1305
30V/15A
Rds(on)=5.5mΩ"] VCC_12V --> Q_FAN Q_FAN --> FAN_LOAD["Cooling Fan
12V/2A"] FAN_LOAD --> GND end subgraph "Pump Control Channel" GATE_DRIVE --> Q_PUMP["VBA1305
30V/15A
Rds(on)=5.5mΩ"] VCC_12V --> Q_PUMP Q_PUMP --> PUMP_LOAD["Liquid Pump
12V/5A"] PUMP_LOAD --> GND end subgraph "Relay Control Channel" GATE_DRIVE --> Q_RELAY["VBA1305
30V/15A
Rds(on)=5.5mΩ"] VCC_12V --> Q_RELAY Q_RELAY --> RELAY_COIL["Relay Coil
12V/100mA"] RELAY_COIL --> GND end subgraph "Communication Power" GATE_DRIVE --> Q_COMM["VBA1305
30V/15A
Rds(on)=5.5mΩ"] VCC_5V --> Q_COMM Q_COMM --> COMM_MODULE["Comm Module
5V/500mA"] COMM_MODULE --> GND end end subgraph "Monitoring & Feedback" CURRENT_MON["Current Monitor"] --> Q_FAN CURRENT_MON --> Q_PUMP TEMP_MON["Temperature Monitor"] --> MCU_GPIO FAULT_DETECT["Fault Detection"] --> PROTECTION["Protection Circuit"] PROTECTION --> MCU_GPIO end style Q_FAN fill:#fff3e0,stroke:#ff9800,stroke-width:2px

Thermal Management & Protection Topology Detail

graph LR subgraph "Three-Level Thermal Management System" subgraph "Level 1: Liquid Cooling for Inverter Bridge" LIQUID_COLD_PLATE["Liquid Cold Plate"] --> Q_U_HIGH["VBP1602 MOSFETs"] LIQUID_COLD_PLATE --> Q_V_HIGH["VBP1602 MOSFETs"] LIQUID_COLD_PLATE --> Q_W_HIGH["VBP1602 MOSFETs"] LIQUID_PUMP["Liquid Pump"] --> LIQUID_COLD_PLATE RADIATOR["Radiator"] --> LIQUID_COLD_PLATE RADIATOR_FAN["Radiator Fan"] --> RADIATOR end subgraph "Level 2: Forced Air Cooling for Boost Stage" HEATSINK_BOOST["Aluminum Heatsink"] --> Q_BOOST["VBE165R15S"] FORCED_FAN["Forced Air Fan"] --> HEATSINK_BOOST AIR_DUCT["Air Duct System"] --> HEATSINK_BOOST end subgraph "Level 3: Natural Cooling for Control Circuits" PCB_COPPER["PCB Copper Pour"] --> SW_FAN["VBA1305"] PCB_COPPER --> SW_PUMP["VBA1305"] PCB_COPPER --> CONTROL_ICS["Control ICs"] PASSIVE_VENTS["Passive Vents"] --> PCB_COPPER end end subgraph "Temperature Monitoring Network" TEMP_SENSOR1["Thermistor 1"] --> Q_U_HIGH TEMP_SENSOR2["Thermistor 2"] --> Q_BOOST TEMP_SENSOR3["Thermistor 3"] --> CONTROL_ICS TEMP_SENSOR4["Ambient Sensor"] --> ENCLOSURE["Enclosure"] TEMP_SENSOR1 --> TEMP_MONITOR["Temperature Monitor IC"] TEMP_SENSOR2 --> TEMP_MONITOR TEMP_SENSOR3 --> TEMP_MONITOR TEMP_SENSOR4 --> TEMP_MONITOR TEMP_MONITOR --> MCU_CONTROL["MCU Control Logic"] MCU_CONTROL --> PWM_OUT["PWM Output"] PWM_OUT --> LIQUID_PUMP PWM_OUT --> RADIATOR_FAN PWM_OUT --> FORCED_FAN end subgraph "Protection & Safety Circuits" subgraph "Electrical Protection" DESAT_PROT["Desaturation Protection"] --> Q_U_HIGH DESAT_PROT --> Q_BOOST OCP_CIRC["Overcurrent Protection"] --> SHUNT_SENSE["Shunt Sensing"] OVP_CIRC["Overvoltage Protection"] --> HV_BUS["HV Bus"] UVLO["Undervoltage Lockout"] --> DRIVER_ICS["Driver ICs"] end subgraph "Thermal Protection" THERMAL_SHUTDOWN["Thermal Shutdown"] --> TEMP_MONITOR DERATING_CONTROL["Power Derating Control"] --> MCU_CONTROL OVERTEMP_ALARM["Overtemperature Alarm"] --> HMI["Human Interface"] end subgraph "Safety & Reliability" ISOLATION_MON["Isolation Monitoring"] --> HV_BUS LEAKAGE_DET["Leakage Detection"] --> LIQUID_COLD_PLATE FIRE_DETECT["Fire Detection"] --> ENCLOSURE end end style Q_U_HIGH fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style Q_BOOST fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style SW_FAN fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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