As high-end smart glasses evolve towards richer functionalities (augmented reality displays, biometric sensing, audio processing), their internal power delivery network (PDN) is no longer a simple voltage regulator. Instead, it is the core determinant of device runtime, thermal comfort, form factor, and reliability. A meticulously designed power chain is the physical foundation for these devices to achieve seamless performance, intelligent power state switching, and prolonged operation within the stringent constraints of size and weight.
However, building such a chain presents unique challenges: How to achieve high conversion efficiency in an ultra-compact space to minimize heat generation near the user? How to ensure stable power delivery to sensitive analog and RF circuits amidst rapid load transients? How to intelligently manage multiple power domains for displays, SoCs, and sensors to maximize battery life? The answers lie in the selection of highly integrated, efficient power devices and their system-level co-design.
I. Three Dimensions for Core Power Component Selection: Coordinated Consideration of Size, Efficiency, and Load Profile
1. Core SoC/Display Power Switch MOSFET: The Enabler of High-Density Power Delivery
The key device selected is the VBQG1317 (30V/10A/DFN6(2x2), Single-N), whose selection is critical for main power rail management.
Efficiency and Thermal Analysis: The ultra-low on-resistance (RDS(on) of 17mΩ @ 10V) is paramount for power paths supplying the main SoC and micro-display, where currents can peak at several amps. The resulting conduction loss (P_con = I² RDS(on)) is minimized, directly reducing heat generation in a device where external heatsinking is impractical. The 30V rating provides ample margin for battery voltage transients in a typical 3.7V-4.2V Li-ion system.
Form Factor and Layout: The DFN6 (2x2) package offers an exceptional balance of current capability and footprint, essential for the densely populated PCB of smart glasses. Its bottom thermal pad is crucial for effective heat dissipation into the PCB ground plane, acting as the primary heatsink.
Dynamic Performance: The trench technology ensures good switching characteristics, necessary for frequency scaling and power gating controlled by the PMIC.
2. Multi-Domain Load Management & Peripheral Switch: The Execution Unit for Intelligent Power Distribution
The key device is the VBC6N2005 (20V/11A/TSSOP8, Common Drain N+N), enabling compact and intelligent control of multiple subsystems.
Typical Load Management Logic: Used to independently power on/off or PWM-control various peripherals such as cameras, depth sensors, and audio amplifiers based on usage scenarios. The dual common-drain configuration is ideal for acting as two independent low-side switches or a single load switch, controlled by the PMIC or microcontroller GPIOs.
Space-Saving Integration: The TSSOP8 package provides two channels in a modest footprint. Its extremely low on-resistance (5mΩ @ 4.5V) ensures negligible voltage drop even when controlling higher-current peripherals, preserving signal integrity and efficiency.
PCB Thermal Management: Despite its small size, heat must be managed through generous copper pours connected to the package's exposed pad and the use of thermal vias to inner layers or the frame.
3. Auxiliary & Low-Power Signal Switching MOSFET: The Gatekeeper for Secondary Circuits
The key device selected is the VB2290 (-20V/-4A/SOT23-3, Single-P), perfect for space-constrained, low-power control functions.
Application Scenarios: Ideal for level shifting, isolating low-power sensor modules (e.g., ambient light, proximity), or controlling vibration motors. Its P-channel configuration simplifies drive circuitry when switching rails connected to the battery or a power rail.
Ultra-Compact Design: The SOT23-3 package is one of the smallest available, allowing placement in extremely tight spaces. The specified on-resistance (65mΩ @ 4.5V) is excellent for its package size, balancing performance with minimal board area consumption.
Drive Simplicity: As a P-MOSFET, it can be driven directly by a low-voltage GPIO when used as a high-side switch for loads referenced to ground, simplifying the design.
II. System Integration Engineering Implementation
1. Multi-Level Thermal Management Architecture
A holistic thermal design is critical for user comfort and component longevity.
Level 1: PCB as Primary Heatsink: For the VBQG1317 and VBC6N2005, utilize multi-layer PCB design with thick copper inner layers. Connect the device thermal pads via arrays of thermal vias to these internal copper planes and the metal frame of the glasses' arms for heat spreading.
Level 2: Layout-Driven Cooling: Ensure adequate spacing around the VBQG1317 and other power devices to avoid heat concentration. Use exposed copper areas on the top/bottom layer under components for additional radiation.
Level 3: Dynamic Power Management (DPM): The most effective thermal tool is software. Implement aggressive DPM, dynamically scaling SoC voltage/frequency and power-gating unused peripherals via the selected MOSFETs to reduce heat generation at the source.
2. Electromagnetic Compatibility (EMC) and Signal Integrity Design
Power Integrity: Place high-frequency decoupling capacitors as close as possible to the drain and source pins of the VBQG1317 and VBC6N2005 to minimize high-current loop area and supply noise.
Radiated EMI Control: For any switching power converter (e.g., buck converter driving the display), ensure the VBQG1317 (if used as a sync FET) switching edges are controlled via gate resistors to reduce high-frequency harmonics. Use grounded shielding cans for sensitive RF/Wi-Fi/BT modules.
Sensitive Signal Protection: When using the VB2290 to switch sensor power rails, ensure its gate drive signal is free from ringing to prevent noise coupling into the sensor analog supply.
3. Reliability Enhancement Design
Electrical Stress Protection: Implement transient voltage suppression (TVS) diodes on all external connections (charging port, audio). Ensure the VDS rating of all selected MOSFETs has sufficient margin (e.g., >2x) over the maximum expected voltage in the circuit.
Fault Diagnosis: Incorporate current-sensing circuits on main power rails (e.g., using a sense resistor in series with the VBQG1317) for overcurrent detection and shutdown. Use the microcontroller's internal temperature sensors or discrete NTCs on the PCB to monitor ambient temperature near key components.
III. Performance Verification and Testing Protocol
1. Key Test Items and Standards:
Total System Runtime Test: Measure battery life under mixed usage profiles (active display, sensing, standby).
Thermal Imaging Test: Use a thermal camera to map surface temperatures of the glasses' frame and lenses during peak load and charging, ensuring user safety and comfort limits are not exceeded.
Transient Response Test: Verify the stability of core voltages during rapid load changes (e.g., display turning on/off) using the selected MOSFETs.
Electromagnetic Compatibility Test: Ensure the device meets FCC/CE standards for radiated and conducted emissions, and is immune to interference.
Drop and Vibration Test: Simulate real-world wear to ensure solder joints of components like the DFN and SOT23 packages remain reliable.
2. Design Verification Example:
Test data from a prototype AR glasses power system (Battery: 3.8V, 600mAh) shows:
The power path efficiency from battery to SoC (using VBQG1317 in a synchronous buck converter) exceeded 92% across load range.
Peak temperature rise on the temple PCB near the VBC6N2005 during simultaneous camera and audio operation was limited to 12°C above ambient.
Standby current, enabled by precise power gating using VB2290 for sensor islands, was maintained below 500µA.
IV. Solution Scalability
1. Adjustments for Different Functionality Tiers:
Basic Smart Glasses (Audio-focused): May rely more on VB2290 for simpler power management, with lower-current switches.
Advanced AR Glasses (with waveguide display): Require the full solution, potentially adding more channels of the VBC6N2005 for additional sensors or a higher-current version of the VBQG1317 for a brighter display driver.
Professional/Industrial Models: May incorporate higher voltage MOSFETs like the VBGQF1610 (60V) to support specialized peripherals or different battery configurations.
2. Integration of Cutting-Edge Technologies:
Advanced Packaging: Future iterations could leverage wafer-level chip-scale packaging (WLCSP) for even smaller MOSFET footprints.
Monolithic Power Integration: The trend is towards PMICs that integrate more power switches and drivers, but discrete MOSFETs will remain vital for high-current paths and flexible load placement.
Adaptive Thermal Throttling: Using real-time temperature feedback from multiple points to dynamically adjust performance and power gating strategies, maximizing user experience within thermal constraints.
Conclusion
The power chain design for high-end smart glasses is a critical exercise in extreme miniaturization and efficiency optimization. It requires a careful balance between electrical performance, thermal management, physical size, and battery life. The tiered selection strategy—employing a high-efficiency, compact MOSFET (VBQG1317) for the core power path, a highly integrated dual switch (VBC6N2005) for intelligent peripheral management, and an ultra-miniature switch (VB2290) for low-power domains—provides a robust, scalable foundation.
As AR/VR technologies converge and functionality expands, power management will become even more central to the user experience. By adhering to principles of high-density layout, meticulous thermal planning, and aggressive dynamic power management built upon these foundational components, engineers can create devices that are not only powerful and feature-rich but also comfortable, reliable, and enduring. This is the essence of transparent technology—delivering seamless capability while disappearing into the form factor, enabling the next generation of wearable computing.

Detailed Topology Diagrams