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Preface: Architecting the "Energy Gateway" for New Energy Vehicles – A Systems Approach to Power Device Selection in On-Board Chargers (OBC)
OBC Power Module System Topology Diagram

OBC Power Module System Overall Topology Diagram

graph LR %% Input Section subgraph "AC Input & EMI Filtering" AC_IN["Universal AC Input
85-265VAC"] --> EMI_FILTER["EMI Input Filter"] EMI_FILTER --> RECTIFIER["Full-Bridge Rectifier"] end %% Primary Side Power Conversion subgraph "Primary Side: PFC & Isolated DC-DC" RECTIFIER --> PFC_INDUCTOR["PFC Boost Inductor"] PFC_INDUCTOR --> PFC_SW_NODE["PFC Switching Node"] subgraph "Primary Side MOSFET Array" Q_PFC1["VBP155R18
550V/18A (TO-247)
Planar MOSFET"] Q_PFC2["VBP155R18
550V/18A (TO-247)
Planar MOSFET"] end PFC_SW_NODE --> Q_PFC1 PFC_SW_NODE --> Q_PFC2 Q_PFC1 --> HV_BUS["High-Voltage DC Bus
~400VDC"] Q_PFC2 --> HV_BUS HV_BUS --> LLC_TRANS["LLC Transformer
Primary"] LLC_TRANS --> LLC_SW_NODE["LLC Switching Node"] LLC_SW_NODE --> Q_LLC1["VBP155R18
Primary Switch"] LLC_SW_NODE --> Q_LLC2["VBP155R18
Primary Switch"] Q_LLC1 --> GND_PRI Q_LLC2 --> GND_PRI end %% Secondary Side Power Conversion subgraph "Secondary Side: Synchronous Rectification" LLC_TRANS_SEC["LLC Transformer
Secondary"] --> SR_SW_NODE["Synchronous Rectification Node"] subgraph "Synchronous Rectification MOSFET Array" Q_SR1["VBQA2302
-30V/-120A (DFN8)
Trench P-MOSFET"] Q_SR2["VBQA2302
-30V/-120A (DFN8)
Trench P-MOSFET"] end SR_SW_NODE --> Q_SR1 SR_SW_NODE --> Q_SR2 Q_SR1 --> OUTPUT_FILTER["Output Filter
LC Network"] Q_SR2 --> OUTPUT_FILTER OUTPUT_FILTER --> DC_OUT["DC Output to Battery
200-500VDC"] DC_OUT --> LOAD["Vehicle Battery
Load"] end %% Auxiliary Power Management subgraph "Auxiliary Power Distribution" AUX_POWER["Auxiliary Power Supply
12V/5V"] --> MCU["Main Control MCU/DSP"] subgraph "Intelligent Load Switches" SW_FAN["VBA4309
Dual P-MOSFET
Fan Control"] SW_COMM["VBA4309
Dual P-MOSFET
Communication Module"] SW_CONTACTOR["VBA4309
Dual P-MOSFET
Contactor Driver"] SW_SENSORS["VBA4309
Dual P-MOSFET
Sensors & Monitoring"] end MCU --> SW_FAN MCU --> SW_COMM MCU --> SW_CONTACTOR MCU --> SW_SENSORS SW_FAN --> FAN["Cooling Fan"] SW_COMM --> COMM_MODULE["Communication Module
(CAN, Ethernet)"] SW_CONTACTOR --> CONTACTOR["Battery Contactor"] SW_SENSORS --> SENSORS["System Monitoring"] end %% Control & Protection subgraph "Control & Protection Circuits" GATE_DRIVER_PRI["Primary Side
Gate Driver"] --> Q_PFC1 GATE_DRIVER_PRI --> Q_PFC2 GATE_DRIVER_PRI --> Q_LLC1 GATE_DRIVER_PRI --> Q_LLC2 GATE_DRIVER_SR["Synchronous Rectification
Driver (Negative)"] --> Q_SR1 GATE_DRIVER_SR --> Q_SR2 subgraph "Protection Circuits" RCD_SNUBBER["RCD Snubber
Primary Side"] RC_SNUBBER["RC Absorption
LLC Switches"] GATE_PROTECTION["Gate Protection
Zener Diodes"] CURRENT_SENSE["High-Precision
Current Sensing"] TEMP_SENSORS["NTC Temperature
Sensors"] end RCD_SNUBBER --> Q_PFC1 RC_SNUBBER --> Q_LLC1 GATE_PROTECTION --> GATE_DRIVER_PRI GATE_PROTECTION --> GATE_DRIVER_SR CURRENT_SENSE --> MCU TEMP_SENSORS --> MCU end %% Thermal Management subgraph "Hierarchical Thermal Management" COOLING_LEVEL1["Level 1: Heatsink
Primary MOSFETs"] --> Q_PFC1 COOLING_LEVEL1 --> Q_LLC1 COOLING_LEVEL2["Level 2: PCB + Heatsink
Synchronous Rectifiers"] --> Q_SR1 COOLING_LEVEL2 --> Q_SR2 COOLING_LEVEL3["Level 3: PCB Conduction
Auxiliary Switches"] --> VBA4309["VBA4309"] MCU --> FAN_CONTROL["Fan PWM Control"] FAN_CONTROL --> FAN end %% Communication Interfaces MCU --> CAN_TRANS["CAN Transceiver"] CAN_TRANS --> VEHICLE_BUS["Vehicle CAN Bus"] MCU --> GRID_COMM["Grid Communication"] MCU --> DIAG_INTERFACE["Diagnostic Interface"] %% Style Definitions style Q_PFC1 fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style Q_SR1 fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style SW_FAN fill:#fff3e0,stroke:#ff9800,stroke-width:2px style MCU fill:#fce4ec,stroke:#e91e63,stroke-width:2px

The On-Board Charger (OBC) is the critical bidirectional energy interface between the electric vehicle and the grid. Its performance dictates charging speed, efficiency, and overall vehicle energy management. More than just an AC/DC converter, a modern OBC is a sophisticated power processing hub, integrating Power Factor Correction (PFC), isolated DC-DC conversion, and intelligent auxiliary power management. The core challenge lies in selecting power semiconductor devices that deliver high efficiency across a wide load range, robust reliability under thermal and electrical stress, and high power density—all within stringent cost targets.
This analysis adopts a holistic, system-level perspective to identify the optimal power MOSFET combination for the three pivotal nodes in an OBC power chain: the high-voltage PFC/primary-side DC-DC stage, the low-voltage secondary-side synchronous rectification stage, and the multi-channel auxiliary power distribution. Based on comprehensive evaluation of voltage/current requirements, switching frequency, thermal performance, and integration needs, we select the following three devices to form a synergistic power solution.
I. In-Depth Analysis of the Selected Device Combination and Application Roles
1. The High-Voltage Conversion Workhorse: VBP155R18 (550V, 18A, TO-247, Planar) – PFC / Isolated DC-DC Primary-Side Switch
Core Positioning & Topology Fit: Ideally suited for the boost PFC stage and/or as the primary-side switch in an isolated LLC or phase-shifted full-bridge DC-DC converter. The 550V drain-source voltage provides a safe margin for universal input (85-265VAC) applications, where the rectified DC bus can reach nearly 400V.
Key Technical Parameter Analysis:
Balanced Performance: With an RDS(on) of 300mΩ @ 10V, it offers a good compromise between conduction loss and silicon cost for this power level (e.g., 3.3-6.6kW OBC). The planar technology provides robust, cost-effective performance.
Package Advantage: The TO-247 package offers an excellent thermal path to the heatsink, which is crucial for managing switching and conduction losses in the continuously operating primary-side circuits.
Selection Rationale: While Super Junction (SJ) devices offer lower RDS(on), this planar MOSFET provides sufficient performance for many mainstream OBC designs, prioritizing system cost and reliability at moderate switching frequencies (e.g., 65-100kHz).
2. The Secondary-Side Efficiency Champion: VBQA2302 (-30V, -120A, DFN8(5x6), Trench) – DC-DC Synchronous Rectifier (SR) / Low-Voltage High-Current Switch
Core Positioning & System Benefit: Engineered as the ultimate synchronous rectifier in the isolated DC-DC stage's secondary side (outputting 12V/24V or directly to the traction battery). Its ultra-low RDS(on) of 2.2mΩ @ 10V is the key to minimizing conduction loss at high output currents.
Direct Efficiency Gain: In a 6.6kW OBC, secondary-side currents can exceed 100A. The exceptionally low RDS(on) of VBQA2302 drastically reduces SR conduction loss, directly boosting full-load and partial-load efficiency.
Thermal Management Simplification: Reduced power dissipation eases thermal design constraints on the secondary side, allowing for a more compact layout or passive cooling strategies.
P-Channel Advantage for High-Side SR: As a P-channel MOSFET in a common-drain (high-side) SR configuration, it can be driven directly from secondary-side controller signals without needing a charge pump or bootstrap circuit, simplifying gate drive design.
Advanced Package: The DFN8(5x6) footprint offers superior thermal performance from the exposed pad compared to traditional SOIC packages, essential for heat dissipation in a high-current-density design.
3. The Intelligent Auxiliary Power Manager: VBA4309 (Dual -30V, -13.5A, SOP8, Trench) – Multi-Channel Auxiliary Power Distribution Switch
Core Positioning & System Integration Advantage: This dual P-channel MOSFET in a compact SOP8 package is the perfect solution for intelligent management of low-voltage auxiliary rails (e.g., 12V) derived within the OBC. It controls power to peripheral circuits like cooling fans, contactor drivers, communication modules, and system monitoring ICs.
Space-Saving Integration: Integrating two independent switches in one package saves over 60% PCB area compared to discrete solutions, enhancing the power density of the control and auxiliary board.
Low RDS(on) for Minimal Drop: With RDS(on) as low as 7mΩ @ 10V per channel, it ensures minimal voltage drop and power loss even when driving several amps of auxiliary load.
Simplified Control Logic: The P-channel architecture allows direct control via low-voltage logic signals (active-low enable), eliminating the need for level shifters and simplifying interfacing with the OBC's microcontroller.
II. System Integration Design and Expanded Key Considerations
1. Topology, Drive, and Control Coordination
Primary-Side Control: The VBP155R18 must be driven by a dedicated high-voltage gate driver IC, ensuring fast switching transitions to minimize losses in PFC or LLC topologies. Dead-time management is critical for bridge configurations.
Synchronous Rectification Timing: The driving of VBQA2302 must be precisely synchronized with the secondary-side voltage or current polarity detection to prevent shoot-through and maximize efficiency. Integrated SR controllers or microcontroller-driven logic with careful timing adjustment are necessary.
Digital Power Management: The gates of VBA4309 should be controlled by the OBC's main MCU or a dedicated PMIC, enabling features like soft-start for capacitive loads, sequenced power-up, and individual channel disabling for fault isolation or low-power standby modes.
2. Hierarchical Thermal Management Strategy
Primary Heat Source (Forced Air Cooling): The VBP155R18(s) on the primary side will be a major heat source. They must be mounted on a well-designed heatsink, potentially shared with the PFC inductor or transformer core.
Secondary High-Current Heat Source (PCB + Heatsink): The VBQA2302 will dissipate significant heat on the secondary side. A multilayer PCB with thick copper pours, an array of thermal vias under its exposed pad, and possibly a small clip-on heatsink are essential.
Auxiliary Power Thermal Handling (PCB Conduction): The VBA4309 can rely on the PCB's internal planes for heat spreading. Ensuring adequate copper area on its drain and source pins is key to maintaining a safe junction temperature.
3. Engineering Details for Reliability Reinforcement
Electrical Stress Protection:
VBP155R18: Utilize snubber networks (RC or RCD) across the switch or transformer primary to clamp voltage spikes caused by leakage inductance, especially in flyback or hard-switched forward topologies.
VBQA2302: Ensure proper layout to minimize parasitic inductance in the high-current secondary-side loop. Consider a small RC snubber if voltage ringing is observed during commutation.
VBA4309: Implement flyback diodes or TVS protection for inductive auxiliary loads (e.g., fan motors, solenoids).
Enhanced Gate Protection: All gate drive loops should be short and compact. Series gate resistors must be optimized for switching speed and EMI. Anti-parallel Zener diodes (e.g., ±15V) between gate and source for each device are recommended for robust ESD and overvoltage protection.
Derating Practice:
Voltage Derating: Ensure VDS stress on VBP155R18 remains below 440V (80% of 550V) under worst-case input surge conditions. For VBQA2302 and VBA4309, ensure applied voltage is well within their -30V rating.
Current & Thermal Derating: Design continuous and pulsed current paths based on junction temperature (Tj) and transient thermal impedance curves. Target a maximum operating Tj below 110°C to ensure long-term reliability. The high current of VBQA2302 necessitates meticulous attention to PCB trace sizing and temperature rise.
III. Quantifiable Perspective on Scheme Advantages
Efficiency Gains: In a 6.6kW OBC secondary side, replacing a typical 5mΩ SR MOSFET with the VBQA2302 (2.2mΩ) can reduce conduction losses by over 50% in that switch, contributing to a system efficiency increase of 0.3-0.5% at full load.
Power Density & Reliability Improvement: Using the integrated VBA4309 for auxiliary power management saves significant board space and reduces component count by ~10-15 parts compared to a discrete solution, directly improving the power density and calculated MTBF of the auxiliary power module.
Cost-Effectiveness: This combination leverages a cost-optimized primary switch (Planar), a performance-optimized secondary switch (Trench), and an integrated auxiliary manager, achieving an excellent balance of system performance and total BOM cost.
IV. Summary and Forward Look
This device selection forms a cohesive and optimized power chain for a high-performance OBC, addressing the core requirements of efficient high-voltage conversion, low-loss power transfer, and intelligent auxiliary management.
High-Voltage Conversion Level – Focus on "Robustness & Cost Balance": The VBP155R18 provides reliable, thermally capable switching for the demanding primary-side environment.
Low-Voltage Power Delivery Level – Focus on "Ultimate Conduction Efficiency": The VBQA2302 is dedicated to minimizing the dominant conduction losses on the high-current secondary side.
Power Management Level – Focus on "Integrated Intelligence & Simplicity": The VBA4309 enables compact, digitally controlled power distribution for auxiliary functions.
Future Evolution Directions:
GaN for Primary Side: For next-generation ultra-high efficiency and high-frequency (MHz+) OBCs, GaN HEMTs can replace the primary-side silicon MOSFETs, dramatically reducing switching losses and enabling smaller magnetics.
Fully Integrated SR Modules: For very high-power OBCs (>11kW), secondary-side synchronous rectification may evolve towards integrated power stages or modules that combine multiple low-RDS(on) MOSFETs with optimized drivers and thermal management.
Smart Load Switches: The auxiliary power management could migrate towards e-fuse or smart load switch ICs with integrated current sensing, diagnostics, and advanced protection features.
This framework can be tailored by engineers based on specific OBC specifications: power rating (e.g., 3.3kW, 11kW, 22kW), target efficiency curves, battery voltage range, thermal management constraints, and safety standards, leading to an optimized and competitive OBC design.

Detailed Topology Diagrams

PFC/Primary Side Power Topology Detail

graph LR subgraph "PFC Boost Stage" A["Universal AC Input
85-265VAC"] --> B["EMI Filter"] B --> C["Full-Bridge Rectifier"] C --> D["PFC Boost Inductor"] D --> E["PFC Switching Node"] subgraph "PFC MOSFET Array" F["VBP155R18
550V/18A"] G["VBP155R18
550V/18A"] end E --> F E --> G F --> H["High-Voltage DC Bus
~400VDC"] G --> H I["PFC Controller"] --> J["Gate Driver"] J --> F J --> G H -->|Voltage Feedback| I end subgraph "LLC Resonant Conversion Stage" H --> K["LLC Resonant Tank"] K --> L["High-Frequency Transformer
Primary"] L --> M["LLC Switching Node"] subgraph "LLC Primary Switches" N["VBP155R18
Primary Switch"] O["VBP155R18
Primary Switch"] end M --> N M --> O N --> P["Primary Ground"] O --> P Q["LLC Controller"] --> R["Gate Driver"] R --> N R --> O L -->|Current Feedback| Q end subgraph "Protection Circuits" S["RCD Snubber"] --> F T["RC Absorption"] --> N U["Zener Protection"] --> J U --> R end style F fill:#e8f5e8,stroke:#4caf50,stroke-width:2px style N fill:#e8f5e8,stroke:#4caf50,stroke-width:2px

Synchronous Rectification Topology Detail

graph LR subgraph "Synchronous Rectification Bridge" A["Transformer
Secondary"] --> B["Synchronous Rectification
Node"] subgraph "Synchronous Rectification MOSFETs" C["VBQA2302
-30V/-120A
DFN8 P-MOSFET"] D["VBQA2302
-30V/-120A
DFN8 P-MOSFET"] end B --> C B --> D C --> E["Output Filter Inductor"] D --> F["Output Ground"] E --> G["Output Capacitor Bank"] G --> H["DC Output Positive
200-500VDC"] I["Synchronous Rectification
Controller"] --> J["Negative Voltage
Gate Driver"] J --> C J --> D end subgraph "Thermal Management" K["Multilayer PCB
with Thermal Vias"] --> C K --> D L["Clip-on Heatsink"] --> C L --> D M["Temperature Sensor"] --> N["MCU"] N --> O["Fan Control"] O --> P["Cooling Fan"] end subgraph "Protection & Layout" Q["Minimize Parasitic
Inductance"] --> C R["RC Snubber"] --> B S["TVS Protection"] --> H T["Current Sensing"] --> N end style C fill:#e3f2fd,stroke:#2196f3,stroke-width:2px style D fill:#e3f2fd,stroke:#2196f3,stroke-width:2px

Auxiliary Power Management Topology Detail

graph LR subgraph "Intelligent Load Switch Configuration" A["MCU GPIO"] --> B["Direct Control
(Active-Low)"] subgraph "VBA4309 Dual P-MOSFET" direction TB C1["Channel 1
Gate"] C2["Channel 2
Gate"] D1["Channel 1
Drain"] D2["Channel 2
Drain"] S1["Channel 1
Source"] S2["Channel 2
Source"] end B --> C1 B --> C2 VCC_12V["12V Auxiliary
Power"] --> D1 VCC_12V --> D2 S1 --> E["Load 1
(Cooling Fan)"] S2 --> F["Load 2
(Communication)"] E --> G["Ground"] F --> G end subgraph "Multiple Channel Applications" subgraph "Channel Group 1" H1["VBA4309-1
Fan Control"] H2["VBA4309-2
Contactor Driver"] end subgraph "Channel Group 2" I1["VBA4309-3
Sensors"] I2["VBA4309-4
Display"] end J["MCU"] --> H1 J --> H2 J --> I1 J --> I2 end subgraph "Protection Features" K["Flyback Diodes"] --> E K --> F L["TVS Protection"] --> VCC_12V M["Current Limit"] --> J N["Thermal Shutdown"] --> J end subgraph "PCB Thermal Design" O["PCB Copper Pour"] --> C1 O --> C2 P["Internal Planes
for Heat Spreading"] --> D1 P --> D2 end style C1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px style H1 fill:#fff3e0,stroke:#ff9800,stroke-width:2px
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