Take an NMOS switch circuit as an example, where the step signal VG1 sets the DC level to 2V and is a square wave with an amplitude of 2V and a frequency of 50Hz, and the turn-on voltage of T2 is also 2V, which makes the MOS tube T2 switch between the on and off states with a cycle of 20ms.

 In this process, an interesting phenomenon occurs: when Vgs = 2V, there is a small platform. So why is there such a small platform when Vgs rises?

 The answer lies in the Miller effect. There are many parasitic capacitors inside the MOS tube.

Among them: Cgs is called GS parasitic capacitance, Cgd is called GD parasitic capacitance, input capacitance Ciss=Cgs+Cgd, output capacitance Coss=Cgd+Cds, reverse transmission capacitance Crss=Cgd, also called Miller capacitance.

 When the circuit is working, the Miller capacitor (Cgd) will significantly increase the equivalent input capacitance value under the effect of inverting amplification. When the input voltage wants to change Vgs, it is necessary to charge this increased equivalent input capacitance. During the charging process, even if the input voltage continues to rise, most of the energy is used to charge the capacitor, which causes the rise speed of Vgs to slow down, thus forming the small Vgs platform we see.

Further investigation revealed that after changing the resistor R1 from 5K to 1K and simulating again, the small platform became significantly smaller or even almost disappeared. This is because the MOS tube is turned on when the input voltage charges Cgs through R1. As the resistance of R1 decreases, the charging time constant becomes smaller, the charging of Cgs is accelerated, and the MOS tube can pass through the Miller platform stage faster and quickly enter the fully turned-on state. Therefore, reducing R1 can improve the Miller platform, making it smaller or even disappearing.